Hello,
this question builds up on a previous question: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1042803/processor-sdk-am64x-triggering-a-system-reset-on-am64x/3864288
So I wanted to reset my Device with the functionality of the SDK. We are currently using a drop with version 08.00.02.13.
The reset shall be done from the R5F-domain and provoke a rerun of the SBL-Bootloader which is stored in flash. When I call the function Sciclient_pmDeviceReset(SystemP_WAIT_FOREVER); The device does not reset or reset in a manner where it is not reachable anymore. The SBL is not called again and the device does not work anymore, which affords connecting with the debugger and resetting everything manually.
So I tried the other option mentioned in the previous topic: directly writing the registers. But I may just misunderstand something because the names of the registers mentioned in the TRM like CTRLMMR_RST_CTRL are nowhere available in the SDK.
So I took a look inside the SDK-files where the registers are named and came to the following solution:
#include <hw_include/cslr.h> #include <hw_include/cslr_soc.h> CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_RST_CTRL, 0x00000006);
But this does just nothing. It returns but the system keeps on working.
So I found in the TRM that the CTRL_MMR might be locked, and so I added extra calls:
CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_LOCK6_KICK0, 0x68EF3490);
CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_LOCK6_KICK1, 0xD172BC5A);
CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_RST_CTRL, 0x00000006);
But this also does nothing. Also the POR-Reset does nothing.
How can I reset the Device so it will run the SBL stored in the OSPI-Flash again (just like powering the device off and powering it on again)?
Best regards
Felix
