Hi experts,
I asked a similiar Question here, but I am still not entirely sure how to run the Test: e2e.ti.com/.../4015800
This is what I came up with:
1. Write 0x0 to RAM
2. Pointer to ECC by shiftin 4Mbytes
3. Set ECC_WR_EN = 0x1
4. change ECC of 2. to 0x51U (ECC for 0x1 calculated with Table 7-1 from Technical Reference with parity)
5. Read 1.
6.Check EPC and ESM 1.4
7. clear CAM and ESM 1.4 and REME bit in RAMERRSTATUS
8. correct ECC back to 0xCU
9. Set ECC_WR_EN = 0x0
(Q1) Is this correct?
Thank you and best regards,
Max
