AM2634: PRU memory access times and blocking habits

Hello there, 

I have some questions to the PRU memory after reading Super deep dive on LBBO with PRU DRAM, for PRU-ICSS devices and AM65x. 

How are the access times for storing and loading data between the PRU and RAM0 on the AM263x?

if an other core is accessing the PRU memory, is the whole memory blocked for the PRU? 

If PRU0 RAM0 is accessed, is PRU1 blocked from accessing its RAM0 (not the same RAM block in the global addressing). 

Best regards, 

Lukas