Hi experts,
From TRM and SDK, I noticed that each read-access to external QSPI-Flash is in byte unit? Is there possibility to read external Flash device in 16 or 32 or even 64-bit?
In sysconfig, we can modify the word length for one QSPI transaction, but I am not sure the compatibility between this configuration with Bootloader driver as shown above. Please give some help.
Thanks
Will
Hi Daniel,
I have modified the SDK <driver/qspi/v0/qspi.c> as follow:
static int32_t QSPI_spiMemMapRead(QSPI_Handle handle)
{
/* Destination address */
uint32_t *pDst = NULL;
/* Source address */
uint32_t *pSrc = NULL;
/* Transaction length */
uint32_t count;
/* Memory mapped command */
uint32_t mmapReadCmd;
uintptr_t temp_addr;
uintptr_t offset;
int32_t status = SystemP_SUCCESS;
uint32_t dummyBytes, dummyBits;
if(handle != NULL)
{
QSPI_Attrs const *attrs = ((QSPI_Config *)handle)->attrs;
QSPI_Object *object = ((QSPI_Config *)handle)->object;
QSPI_Transaction *transaction = object->transaction;
const CSL_QspiRegs *pReg = (const CSL_QspiRegs *)attrs->baseAddr;
/* Get flash offset */
offset = (uintptr_t)transaction->addrOffset;
/* Extract memory map mode read command */
mmapReadCmd = (uint32_t)object->readCmd;
/* Set the number of address bytes */
CSL_REG32_FINS((&pReg->SPI_SETUP0_REG)+(attrs->chipSelect * 0x4U),
QSPI_SPI_SETUP0_REG_NUM_A_BYTES, (object->numAddrBytes - 1));
dummyBytes = object->numDummyBits / 8U;
dummyBits = object->numDummyBits % 8U;
CSL_REG32_FINS((&pReg->SPI_SETUP0_REG)+(attrs->chipSelect * 0x4U),
QSPI_SPI_SETUP0_REG_NUM_D_BITS, dummyBits);
CSL_REG32_FINS((&pReg->SPI_SETUP0_REG)+(attrs->chipSelect * 0x4U),
QSPI_SPI_SETUP0_REG_NUM_D_BYTES, dummyBytes);
CSL_REG32_FINS((&pReg->SPI_SETUP0_REG)+(attrs->chipSelect * 0x4U),
QSPI_SPI_SETUP0_REG_RCMD, mmapReadCmd);
switch(object->rxLines)
{
case QSPI_RX_LINES_SINGLE:
{
CSL_REG32_FINS((&pReg->SPI_SETUP0_REG)+(attrs->chipSelect * 0x4U),
QSPI_SPI_SETUP0_REG_READ_TYPE, QSPI_MEM_MAP_READ_TYPE_NORMAL);
break;
}
case QSPI_RX_LINES_DUAL:
{
CSL_REG32_FINS((&pReg->SPI_SETUP0_REG)+(attrs->chipSelect * 0x4U),
QSPI_SPI_SETUP0_REG_READ_TYPE, QSPI_MEM_MAP_READ_TYPE_DUAL);
break;
}
case QSPI_RX_LINES_QUAD:
{
CSL_REG32_FINS((&pReg->SPI_SETUP0_REG)+(attrs->chipSelect * 0x4U),
QSPI_SPI_SETUP0_REG_READ_TYPE, QSPI_MEM_MAP_READ_TYPE_QUAD);
break;
}
default:
break;
}
temp_addr = ((uintptr_t)attrs->memMapBaseAddr + (uintptr_t)transaction->addrOffset);
pSrc = ((uint32_t *)(temp_addr));
pDst = (uint32_t *)transaction->buf;
count = transaction->count;
if (attrs->dmaEnable == true)
{
QSPI_edmaTransfer(pDst, pSrc, count, handle);
}
else
{
while(count > 0)
{
/* Do the normal memory to memory transfer. Copy will be in bytes */
*pDst = *pSrc;
pDst++;
pSrc++;
count -= 4;
}
}
}
else
{
status = SystemP_FAILURE;
}
return status;
}
And I compared with the original one. The results are shown in following figures:
(1) the original one:
(2) the modified one:
As you can see, the CPU load time is shorter.
Best Regards,
Will
Hi Daniel,
I have captured the QSPI CLK waveforms when using DMA to boot the SBL, and I found that the width of DMA accessing to QSPI is 128-bit.
Further I found there are 2 continuous read-access to external Flash when using DMA, and I think it is caused by the default burst size configuration (DBS) of DMA as shown in TRM:
It seems that the SBL configures the DBS to 2'b01 and so that 32 bytes burst reading is used here.
I want to know how to modify the DBS configuration? So that I can modify the DBS configuration to 2'b11 and improve the speed of SBL boot further.
Best Regards,
Will
Hi Ashwin,
I add the following register modification in SBL demo and use it to boot the appimage, it can improve the boot performance as shown in the following two figures.
int32_t status;
Bootloader_profileReset();
Bootloader_socConfigurePll();
Bootloader_socInitL2MailBoxMemory();
System_init();
Bootloader_profileAddProfilePoint("System_init");
*((uint32_t *) (0x50D00800)) = 0x3U ;
(1) Modify the TPTC_DBS_CONFIG register:
(2) Default vale of the TPTC_DBS_CONFIG register:
I have also checked the .rprc file of the application, it shows that there are 2 sections for my appimage, one is vector section and another one is the text/data section. The rprc file also contains RPRC header, Section 1 header and Section 2 header and they also need to be transferred between Flash device and MCU. Those headers and vector section is too short to be improved by burst mode. By the way, these headers are all five 32-bit words length and this odd number length will add boot time according to the waveforms of QSPI.
Thanks again for BU's guidance.
Will