AM2431: Want to use Data Bit Sswapping for LPDDR4 Design

Hi,

My customer has a question about PWB design around LPDDR4. The Application Note "AM64x/AM243x DDR Board Design and Layout Guidelines(SPRACU1A)" says as follows;

"3.15 Channel, Byte, and Bit Swapping
All signals, including data and address / control, must be routed 1 to 1 from the DDR controller to the LPDDR4 memory. Byte swapping across channels or within a channel is not allowed. Similarly, data bit swapping across byte lanes or within a byte is also not allowed."

Their PWB designers want to use a data bit swapping scheme. And they say that data bit swapping is available on LPDDR4 PWB design and memory devices has the function.

Does the description in the Applicatin note means
1. DDR contrller on AM2431 doesn't have data bit swapping function, but We can use the function on memory device side ?
      or
2. Data bit swapping is not allowed both AM2431 side and memory device side ?

On the other hand, there is the following description about DDR4 in the same application note.

2.17.1 Data Bit Swapping
Data bit swapping is allowed to simplify routing as long as the bits swapped are within the same byte group. This is only possible when not using CRC. However, the prime bit, the lowest numbered bit in each byte, must be connected to the corresponding bit on the SDRAM without swapping. That is bit 0 and bit 8. Also, the DM and DQS bits must not be swapped.

We found a similar article on E2E forum.
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/834504/tda4m-isn-t-bit-swap-in-byte-supported-by-lpddr4?tisearch=e2e-quicksearch&keymatch=LPDDR4

Can they use a data bit swapping for LPDDR4 design ?

Regards,

Hideaki