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Hi:
I wrote a bootloader library that works with Ethernet, when I start the main application from bank 1 sector 0, the bootloader works fine, but when I start the application from the bank 0 sector 5, where the bootloader ends, it gets stuck at "while (FAPI_GET_FSM_STATUS != Fapi_Status_Success)". But fapi init operation is done successfully.
Bootloader program size: 142Kb
To run fapi in sram I configured the linker as follows.
/* Copyright (C) 2013-2019 Texas Instruments Incorporated - http://www.ti.com/ * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* */ /*----------------------------------------------------------------------------*/ /* USER CODE BEGIN (0) */ /* USER CODE END */ /*----------------------------------------------------------------------------*/ /* Linker Settings */ --retain="*(.intvecs)" /* USER CODE BEGIN (1) */ /* USER CODE END */ /*----------------------------------------------------------------------------*/ /* Memory Map */ MEMORY { VECTORS (X) : origin=0x00000000 length=0x00000020 vfill=0xFFFFFFFF FLASH0 (RX) : origin=0x00000020 length=0x180000-0x20 vfill=0xFFFFFFFF FLASH1 (RX) : origin=0x00180000 length=0x00180000 vfill=0xFFFFFFFF SRAM (RW) : origin=0x08002000 length=0x0002D000 STACK (RW) : origin=0x08000000 length=0x00002000 /* USER CODE BEGIN (2) */ #if 1 ECC_VEC (R) : origin=(0xf0400000 + (start(VECTORS) >> 3)) length=(size(VECTORS) >> 3) ECC={algorithm=algoL2R5F021, input_range=VECTORS} ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0) >> 3)) length=(size(FLASH0) >> 3) ECC={algorithm=algoL2R5F021, input_range=FLASH0 } ECC_FLA1 (R) : origin=(0xf0400000 + (start(FLASH1) >> 3)) length=(size(FLASH1) >> 3) ECC={algorithm=algoL2R5F021, input_range=FLASH1 } #endif /* USER CODE END */ } /* USER CODE BEGIN (3) */ ECC { algoL2R5F021 : address_mask = 0xfffffff8 /* Address Bits 31:3 */ hamming_mask = R4 /* Use R4/R5 build in Mask */ parity_mask = 0x0c /* Set which ECC bits are Even and Odd parity */ mirroring = F021 /* RM57Lx and TMS570LCx are build in F021 */ } /* USER CODE END */ /*----------------------------------------------------------------------------*/ /* Section Configuration */ SECTIONS { /* USER CODE BEGIN (4) */ .intvecs : {} > VECTORS flashAPI: { .\.\libraries\f021_flash_api_02.01.01\source\Fapi_UserDefinedFunctions.obj (.text) .\.\libraries\flash\Src\flash.obj (.text) --library= "D:\Projects\ANAKS\embedded-library\F023_FLASH_API\f021_flash_api_02.01.01\F021_API_CortexR4_BE.lib" (.text) } palign=8 load = FLASH0 | FLASH1, run = SRAM, LOAD_START(fapi_load_start), RUN_START(fapi_run_start), SIZE(fapi_load_size) .text : {} > FLASH0 | FLASH1 /*Initialized executable code and constants*/ .const : {} load = FLASH0 | FLASH1, run = SRAM, LOAD_START(fapi_const_load_start), RUN_START(fapi_const_run_start), SIZE(fapi_const_load_size) .cinit : {} > FLASH0 | FLASH1 /*Initialized global and static variables*/ .pinit : {} > FLASH0 | FLASH1 .data : {} > SRAM .bss : {} > SRAM /*Uninitialized Global and static variables */ .sysmem : {} > SRAM /* USER CODE END */ } /* USER CODE BEGIN (5) */ /* USER CODE END */ /*----------------------------------------------------------------------------*/ /* Misc */ /* USER CODE BEGIN (6) */ /* USER CODE END */ /*----------------------------------------------------------------------------*/
Bootloader app memory allocation:
Where could I be going wrong? Can you help me?
Best regards, good work...
Can you update the linker cmd file of your bootloader as below?
.intvecs : {} > VECTORS
flashAPI:
{
.\.\libraries\f021_flash_api_02.01.01\source\Fapi_UserDefinedFunctions.obj (.text, .data)
.\.\libraries\flash\Src\flash.obj (.text, .data)
--library= "D:\Projects\ANAKS\embedded-library\F023_FLASH_API\f021_flash_api_02.01.01\F021_API_CortexR4_BE.lib" (.text, .data)
} palign=8 load = FLASH0 | FLASH1, run = SRAM, LOAD_START(fapi_load_start), RUN_START(fapi_run_start), SIZE(fapi_load_size)
.text : {} > FLASH0 | FLASH1 /*Initialized executable code and constants*/
.const : {} load = FLASH0 | FLASH1, run = SRAM, LOAD_START(fapi_const_load_start), RUN_START(fapi_const_run_start), SIZE(fapi_const_load_size)
.cinit : {} > FLASH0 | FLASH1 /*Initialize
When your application is programmed to flash BANK1, are the flash API and related functions executed from SRAM or flash?
I updated the linker cmd file as you requested, but it still didn't work.
Yes, I'm copying fapi related processes from flash to sram in main.
Can you check the map file of your bootloader to make sure no code or data is allocated to sector 5 of bank 0?
Try one more thing: change FLASH0 to be flash sector 0~sector 4, and all data and text are allocated to flash sector 0 ~ sector 4.
MEMORY
{
VECTORS (X) : origin=0x00000000 length=0x00000020 vfill=0xFFFFFFFF
FLASH0 (RX) : origin=0x00000020 length=0x40000-0x20 vfill=0xFFFFFFFF
FLASH1 (RX) : origin=0x0040000 length=0x002E0000-0x40000 vfill=0xFFFFFFFF
SRAM (RW) : origin=0x08002000 length=0x0002D000
STACK (RW) : origin=0x08000000 length=0x00002000
/* USER CODE BEGIN (2) */
#if 1
ECC_VEC (R) : origin=(0xf0400000 + (start(VECTORS) >> 3))
length=(size(VECTORS) >> 3)
ECC={algorithm=algoL2R5F021, input_range=VECTORS}
ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0) >> 3))
length=(size(FLASH0) >> 3)
ECC={algorithm=algoL2R5F021, input_range=FLASH0 }
ECC_FLA1 (R) : origin=(0xf0400000 + (start(FLASH1) >> 3))
length=(size(FLASH1) >> 3)
ECC={algorithm=algoL2R5F021, input_range=FLASH1 }
#endif
/* USER CODE END */
}
/* USER CODE BEGIN (3) */
ECC
{
algoL2R5F021 : address_mask = 0xfffffff8 /* Address Bits 31:3 */
hamming_mask = R4 /* Use R4/R5 build in Mask */
parity_mask = 0x0c /* Set which ECC bits are Even and Odd parity */
mirroring = F021 /* RM57Lx and TMS570LCx are build in F021 */
}
/* USER CODE END */
/*----------------------------------------------------------------------------*/
/* Section Configuration */
SECTIONS
{
/* USER CODE BEGIN (4) */
.intvecs : {} > VECTORS
flashAPI:
{
.\.\libraries\f021_flash_api_02.01.01\source\Fapi_UserDefinedFunctions.obj (.text)
.\.\libraries\flash\Src\flash.obj (.text)
--library= "D:\Projects\ANAKS\embedded-library\F023_FLASH_API\f021_flash_api_02.01.01\F021_API_CortexR4_BE.lib" (.text)
} palign=8 load = FLASH0, run = SRAM, LOAD_START(fapi_load_start), RUN_START(fapi_run_start), SIZE(fapi_load_size)
.text : {} > FLASH0 /*Initialized executable code and constants*/
.const : {} load = FLASH0, run = SRAM, LOAD_START(fapi_const_load_start), RUN_START(fapi_const_run_start), SIZE(fapi_const_load_size)
.cinit : {} > FLASH0 /*Initialized global and static variables*/
.pinit : {} > FLASH0
.data : {} > SRAM
.bss : {} > SRAM /*Uninitialized Global and static variables */
.sysmem : {} > SRAM
/* USER CODE END */
}
/* USER CODE BEGIN (5) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/
/* Misc */
/* USER CODE BEGIN (6) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/
1. "Try one more thing: change FLASH0 to be flash sector 0~sector 4, and all data and text are allocated to flash sector 0 ~ sector 4."
I tried but unfortunately it didn't work
2. Can you check the map file of your bootloader to make sure no code or data is allocated to sector 5 of bank 0?
I checked the map file, it looks like no fields are set for bank 0 sector 5
I am attaching the file in case you want to review it. Bootloader_TMS_map.rar
"Fapi_issueAsyncCommandWithAddress" returns success
"FAPI_GET_FSM_STATUS" flag is never "Fapi_Status_Success" so it drops to timeout after ~5s
Variable values.
I just run the similar test of erasing sector 5, and didn't any problem.
The interrupts are not disabled inside the flash APIs. It is recommended that you disable the interrupts before calling flash API. Is any interrupt enabled?
Hello again,
Yes I stop all interrupts
While examining the "SafetyMCU_Bootloaders" sample project, I noticed that it only initializes bank 0 before doing the "Fapi_BlockErase" operation.
I'm initing bank 0 and bank 1 at the same time, I found it only works when I init bank 0, isn't it a correct method to init bank 0 and bank 1 at the same time?