AM2432: Details on RAT

Hi Sl.

As you mentioned in you thread, the RAT for M4F core is for address translation (virtual address pace to physical address place). It will be M4F core to access bigger virtual address space (2^48). At this point, I do not  see any usage of RAT in MCU+ SDK, because the  AM243x SOC uses 32-bit address space. There is no need to use 48 bit address space, so all entry in RAT should be virtual address equals to physical address.

The M4F is in the MCU domain. It is mainly designed for safety. It is on purpose that M4F only uses the peripherals in MCU domain in SysConfig, even though M4F can access to the peripherals in the MAIN domain.

Best regards,

Ming 

Hi Ming,

Thanks for your kindly response.

In ALX package(11x11) without DDR memory access, is there any need to use RAT for M4FSS to access MAIN domain?

I found below e2e that it is needed to set RAT for M4FSS to access MAIN domain or 2MB MSMC memory, and would like to clarify this.

https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1075115/am2431-access-from-m4f-in-mcu-domain-to-peripherals-in-main-domain/3984652?tisearch=e2e-sitesearch&keymatch=RAT#3984652

And do we have a plan to release example how M4FSS can access the peripherals in MAIN domain and the 2MB MSMC memory?

Thanks and Best Regards,

SI.

Hi SL,

For ALV, if the M4F core want to access to DDR, it has to set both MPU and RAT properly.

For ALX, since there is no DDR interface, so M4F cannot access to DDR, but it can access to other memory in MAIN domain like the OCRAM (0x70000000) or OSPI flash (0x60000000). Of course, you will need to set both MPU and RAT properly.

Best regards,

Ming  

Ming,

Thanks for the clarification.

Do you mean it is needed to set RAT properly when M4F access to OCRAM and peripherals of MAIN domain although it is 32bit?

Ming Wei said:

you will need to set both MPU and RAT properly.

When you say to set MPU properly, is it 'Config MPU Region'x to set memory region?

Thanks and Best Regards,

SI.

Ming,

Sorry for bothering you, but I'm still confusing.

Ming Wei said:

At this point, I do not  see any usage of RAT in MCU+ SDK, because the  AM243x SOC uses 32-bit address space.

Does this mean there is no need to use RAT when M4F access on their own peripherals & internal SRAM in MCU domain?

Ming Wei said:

Yes. You will need to set the virtual address and the physical address the same or OCRAM in RAT.

When M4F access to peripherals of MAIN domain, should RAT be set properly? why RAT should be used although AM243x SOC uses 32-bit address space even in MAIN domain?

Thanks and Best Regards,

SI.

Hi SI,

There is not need for RAT settings for its internal SRAM (256KB) and the peripherals in MCU domain, but you do need RAT entries for DDR and OSPI flash memory space:

You will need MPU entries for its internal SRAM (256KB), the peripherals in MCU domain, OCRAM, DDR and OSPI flash:

Best regards,

Ming

Hi Ming,

Thanks for clarification. I have one more question for my understanding.

Then, my understanding is that there is no need to have RAT entries when M4F core will access to the peripherals of MAIN domain or OCRAM of MAIN domain, right?

Thanks and Best Regards,

SI.

Hi SI,

I looked into the IPC M4F examples. It seems TRUE that for M4F core to use OCRAM, there is no need for RAT entry. I am not sure about the MAIN domain peripherals. 

However there is an RAT entry for OSPI flash (0x60000000), but no MPU entry for OSPI flash.

In my opinion, both MPU and RAT entry has to be added for each address space used by the M4F core, even though the virtual address is the same as the physical address, like 0x60000000 for OSPI flash, 0x70000000 for OCRAM, because those RAT and MPU entry should not cause any issue, even they may not needed.

Best regards,

Ming