Hi Team,
iam using TMS570LC43X EVL board and iam doing PBIST selftest but my code always getting test fail, please find what i did mistake in my code.
/** @file HL_sys_main.c
* @brief Application main file
* @date 11-Dec-2018
* @version 04.07.01
*
* This file contains an empty main function,
* which can be used for the application.
*/
/*
* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* USER CODE BEGIN (0) */
/* USER CODE END */
/* Include Files */
#include "HL_sys_common.h"
#include "HL_reg_pbist.h"
#include "HL_errata_SSWF021_45_defs.h"
/* USER CODE BEGIN (1) */
/* USER CODE END */
/** @fn void main(void)
* @brief Application main function
* @note This function is empty by default.
*
* This function is called after startup.
* The user can use this function to implement the application.
*/
/* Self check for PBIST controller */
int main()
{
PBIST_SelfCheck();
}
void PBIST_SelfCheck(void)
{
volatile uint32 i = 0U;
uint32 index, retval;;
uint32 PBIST_wait_done_loop = 0U;
/* Run a diagnostic check on the memory self-test controller */
// Step 1:
/* Disable PBIST clocks and ROM clock */
pbistREG->PACT = 0x0U;
// Step 2:
// ROM clock source is GCLK1 divided by 4. PBIST will reset for 64 VBUS cycles
// Maximum PBIST ROM_CLK frequency supported is 82.5MHz.
// Memory self-test controller is disabled
systemREG1->MSTGCR &= 0xFFFFFCF0UL;
systemREG1->MSTGCR |= 0x00000205UL;
// Step 3:
// Global memory hardware initialization is disabled
systemREG1->MINITGCR = 0x5U;
// Step 4:
// Memory self-test controller is enabled
systemREG1->MSTGCR &= 0xFFFFFFF0UL;
systemREG1->MSTGCR |= 0xAUL;
// Step 5:
// Memory self-test run complete status: Memory self-test is not completed
systemREG1->MSTCGSTAT = 0x1U;
// Step 6:
// PBIST controller is enabled
systemREG1->MSINENA = 0x1U;
// Step 7:
// Wait for 64 VBUS clock cycles at least, based on HCLK to VCLK ratio
#define VBUS_CLK_CYCLES 64U
for (index = 0UL; index < (VBUS_CLK_CYCLES + (VBUS_CLK_CYCLES * 1u)); index++);
// Step 8:
// Enable PBIST internal clocks.
pbistREG->PACT = 0x1UL;
// Step 9:
// CPU control of PBIST, setting this bit allows the host processor to
// configure the PBIST controller registers
pbistREG->DLR = 0x10UL;
// Step 10:
// TODO: Custom always fail algorithm, this will not use the ROM and just set a fail
// Ram Group Select: 0
// Return Data Select: 0
// Data Width Register: 2
// Sense Margin Select Register: 0
// Pipeline Latency Select: 0
// RAM Latency Select: 0
pbistREG->RAMT = 0x00002000UL;
*(volatile uint32 *)0xFFFFE400U = 0x4C000001U;
*(volatile uint32 *)0xFFFFE440U = 0x00000075U;
*(volatile uint32 *)0xFFFFE404U = 0x4C000002U;
*(volatile uint32 *)0xFFFFE444U = 0x00000075U;
*(volatile uint32 *)0xFFFFE408U = 0x4C000003U;
*(volatile uint32 *)0xFFFFE448U = 0x00000075U;
*(volatile uint32 *)0xFFFFE40CU = 0x4C000004U;
*(volatile uint32 *)0xFFFFE44CU = 0x00000075U;
*(volatile uint32 *)0xFFFFE410U = 0x4C000005U;
*(volatile uint32 *)0xFFFFE450U = 0x00000075U;
*(volatile uint32 *)0xFFFFE414U = 0x4C000006U;
*(volatile uint32 *)0xFFFFE454U = 0x00000075U;
*(volatile uint32 *)0xFFFFE418U = 0x00000000U;
*(volatile uint32 *)0xFFFFE458U = 0x00000001U;
// Step 11:
// TODO: Run PBIST
//00001 Start / Time Stamp mode restart
//00010 Resume / Emulation read
//00100 Stop
//01000 Step / Step for emulation mode
//10000 Check MISR mode
pbistREG->rsvd1[1U] = 0x1U;
// Step 12:
// Wait until memory self-test done is indicated
while ((systemREG1->MSTCGSTAT & 0x1U) != 0x1U)
{
PBIST_wait_done_loop++;
}/* Wait */
/* Check for the failure */
index = pbistREG->FSRF0 & 0x1U;
retval = pbistIsTestPassed();
/* Disable PBIST clocks and ROM clock */
pbistREG->PACT = 0x0U;
/* Disable PBIST */
systemREG1->MSTGCR &= 0xFFFFFFF0U;
systemREG1->MSTGCR |= 0x5U;
// Step 13:
// Disable PBIST clocks and ROM clock
pbistREG->PACT = 0x0UL;
// Step 14:
// Disable PBIST
systemREG1->MSTGCR &= 0xFFFFFFF0UL;
systemREG1->MSTGCR |= 0x5UL;
}
boolean pbistIsTestPassed(void)
{
/* USER CODE BEGIN (24) */
/* USER CODE END */
boolean status;
if ((pbistREG->FSRF0 == 0U) && (pbistREG->FSRF0 == 0U))
{
status = TRUE;
}
else
{
status = FALSE;
}
}
thanks and regards
srinivasa k
