• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 30 subscribers
  • Views 260 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

TMS570LC4357: Transferring data from shared RAM to EMIF via DMA

TMS570LC4357: Writing into shared RAM from interrupt

Georg Georg
Prodigy 120 points
Part Number: TMS570LC4357

Hi,

as referenced in the question (https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1209144/tms570lc4357-transferring-data-from-shared-ram-to-emif-via-dma) I am trying to transfer some data from a shared RAM to EMIF via DMA. I am using free RTOS and already managed to transfer data by creating a task that updates the buffer. Now, I need to update data in the shared RAM as soon as I receive an interrupt. When I try to modify such data (16 bits) from the interrupt routine, I observed undesired behavior, where sometimes I write the data I want, sometimes I don't and I get completely different values of what I'd expect. If I modify the same data directly with the task, the data is correctly written. However, I need to change this data as soon as the interrupt indicates it.

Could you maybe tell me how to fix this problem.

Thanks in advance,

  • 0
    TI__Guru 69771 points

    Hi Georg,

    We started working on your issue and will provide an update soon.

    --

    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    TI__Guru 69771 points

    Hi Georg,

    Little confusion, i want clarification for below things,

    1. DMA is only reading the shared RAM right? It won't write anything right?

    2. The only place you are writing the data to the shared RAM is from interrupt only right? did you comment out and tested the writing from task while doing from interrupt routine?

    3. How you are planning to maintain the synchronization between the DMA access and CPU access? I mean both should not access the shared memory at the same time right, this would lead to the race around condition, right?

    --

    Thanks & regards,
    Jagadish.