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AM2634: SBL is not able to boot the application when flashed .appimage to external memory

Prashanth Arun
Intellectual 255 points
Part Number: AM2634
Other Parts Discussed in Thread: UNIFLASH

Hi TI experts,

We have choosen 0x70040000 as the start address for our startup code, but still SBL is not able to boot the application from external FLASH.

But the application runs on the RAM directly when flashed through CCS.

Are we configuring the address correctly ? How does SBL gets to know the start location ? What could be wrong here ?

  • 0
    TI__Mastermind 26025 points

    Hi Prashanth,

    As AM263x is an external flash device. If you load the image via CCS, it will get automatically placed in the RAM memory only.

    Please follow the steps as mentioned here to flash the same in external flash - https://software-dl.ti.com/mcu-plus-sdk/esd/AM263X/latest/exports/docs/api_guide_am263x/GETTING_STARTED_FLASH.html

    Use SBL-QSPI to boot over resets. Hope it helps.

    Best Regards,
    Aakash

  • 0 in reply to Aakash Kedia
    Intellectual 255 points

    Hi , We have flashed through the same steps that is mentioned in https://software-dl.ti.com/mcu-plus-sdk/esd/AM263X/latest/exports/docs/api_guide_am263x/GETTING_STARTED_FLASH.html

    But issue is when we flash the appimage of example code to external flash it is booting the application but when we flash our project application appimage its not jumping to main.

    INFO:

    1) We have kept the start address as 0x70040000 for OCRAM and FLASH as 0x60100000

     

  • 0 in reply to Prashanth Arun
    TI__Mastermind 26025 points

    Hi ,

    How is your application linker different from the empty_project linker in the SDK ? Are you making sure that the sections used are paligned(8) ?

    Best Regards,
    Aakash

  • 0 in reply to Aakash Kedia
    Intellectual 255 points

    Hi , From the AUTOSAR tool generated LINKER file, I am able to see we are using alignment of 4, do we need to have it for 8bytes ?

  • 0 in reply to Prashanth Arun
    TI__Mastermind 26025 points

    Hi ,

    If you are using SBL from SDK, you need to follow the application formatting based on SDK linker files. The RPRC tool requires sections to be aligned by 8 and size also aligned by 8.

    https://dev.ti.com/tirex/nodeContent?node=A__ALyTBKF-OKQ4JTpqlFHr6A__com.ti.MCU_PLUS_SDK_AM263X__aBmeCqF__LATEST

    Hope it helps.

    Best Regards,
    Aakash

  • 0 in reply to Aakash Kedia
    Intellectual 255 points

    Hi One more question, Is the alignment of 8 is applicable for all the sections or only for startup sections ?

  • 0 in reply to Prashanth Arun
    TI__Mastermind 26025 points

    Hi ,

    It is applicable for all the sections. How the rprc tool works is it converts the *.out format to RPRC format which only allows 8B aligned section addresses and sizes to be considered.

    Best Regards,
    Aakash

  • 0 in reply to Aakash Kedia
    Intellectual 255 points

    Hi , 

    We changed the Alignment from 4 Byte to 8 Byte as shown in below linker but application is not getting loaded to RAM.

    Are we missing anything here ?

    We changed ALIGN(8) to palign(8)

    We tried the following below test scenarios:

    1) We have changed the ALIGNMENT from 4B to 8B which is present in the linker below:

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    /**********************************************************************************************************************
    * EXAMPLE CODE ONLY
    * -------------------------------------------------------------------------------------------------------------------
    * This Example Code is only intended for illustrating an example of a possible BSW integration and BSW configuration.
    * The Example Code has not passed any quality control measures and may be incomplete. The Example Code is neither
    * intended nor qualified for use in series production. The Example Code as well as any of its modifications and/or
    * implementations must be tested with diligent care and must comply with all quality requirements which are necessary
    * according to the state of the art before their use.
    *********************************************************************************************************************/
    /**********************************************************************************************************************
    * CAUTION - DO NOT EDIT
    * -------------------------------------------------------------------------------------------------------------------
    * Never manually edit the following memory definitions in this file. Only change them in the vLinkGen configuration
    * (/MICROSAR/vLinkGen/vLinkGenMemLayout/vLinkGenMemoryRegion/vLinkGenMemoryRegionBlock) and regenerate the files.
    *********************************************************************************************************************/
    MEMORY
    {
    CoreExceptions_R5SS0_CORE0 : ORIGIN = 0x00000000 , LENGTH = 0x00000060 /* 96 Byte */
    StartupCode_FirstExecInst : ORIGIN = 0x70000000 , LENGTH = 0x00000400 /* 1024 Byte */
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

  • 0 in reply to Prashanth Arun
    TI__Mastermind 26025 points

    Hi ,

    Please share the map file generated for better analysis.

    Best Regards,
    Aakash

  • 0 in reply to Aakash Kedia
    Intellectual 255 points

    Hi , Please find the map file for analysis:

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    ******************************************************************************
    TI ARM Clang Linker PC v2.1.2
    ******************************************************************************
    >> Linked Wed Jun 7 09:18:13 2023
    OUTPUT FILE NAME: <TestSuit.out>
    ENTRY POINT SYMBOL: "intvect_CoreExceptions" address: 00000000
    MEMORY CONFIGURATION
    name origin length used unused attr fill
    ---------------------- -------- --------- -------- -------- ---- --------
    CoreExceptions_R5SS0_ 00000000 00000060 00000060 00000000 RWIX
    ReservedRegion 70000000 00002000 00000064 00001f9c RWIX
    SBL 70002000 0002bc00 00000000 0002bc00 RWIX
    StartupCode_FirstExec 7002dc00 00000400 00000204 000001fc RWIX
    Application 7002e000 001d0ff0 00018d68 001b8288 RWIX
    StartupStack_Shared 701feff0 00001000 00001000 00000000 RWIX
    Variables_Shared 701ffff0 00000010 00000001 0000000f RWIX
    CoreExceptions_R5SS0_ 78200000 00000060 00000000 00000060 RWIX
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

  • 0 in reply to Prashanth Arun
    TI__Mastermind 26025 points

    Hi Prashanth,

    You should be aligning all the sections like this -

    I see a lot of your sections like BrsMain_Startup_Code, OS_CODE, text section, MSR_VAR_INIT and so on..

    All the sections should be PALIGN(8) like the one mentioned in the picture.

    Best Regards,
    Aakash

  • 0 in reply to Aakash Kedia
    Intellectual 255 points

    Hi , We have aligned all the linker sections with palign(8) (Each and Every section) but I am getting below error from tool after flashing, attached the linker and Map file below:

    1) Flashes flash writer --> No error

    2) Flashes SBL QSPI --> No error

    3) while flashing the appimage and progress 100% I get the below error as 

    Error getting before flashing complete:

    Flashes appimage till 100%.

    Log of flashing file:

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    [INFO] Parsing config file ... SUCCESS. Found 3 command(s) !!!
    [INFO] Executing command 1 of 3 ...
    [INFO] Found flash writer ... sending C:/ti/mcu_plus_sdk_am263x_08_03_01_05/tools/boot/sbl_prebuilt/am263x-cc/sbl_uart_uniflash.debug.tiimage
    [INFO] Sent flashwriter C:/ti/mcu_plus_sdk_am263x_08_03_01_05/tools/boot/sbl_prebuilt/am263x-cc/sbl_uart_uniflash.debug.tiimage of size 64294 bytes in 5.72s.
    [INFO] Executing command 2 of 3 ...
    [INFO] Command arguments : --file=C:/ti/mcu_plus_sdk_am263x_08_03_01_05/tools/boot/sbl_prebuilt/am263x-cc/sbl_qspi.debug.tiimage --operation=flash --flash-offset=0x0000
    Sent C:/ti/mcu_plus_sdk_am263x_08_03_01_05/tools/boot/sbl_prebuilt/am263x-cc/sbl_qspi.debug.tiimage of size 99774 bytes in 10.55s.
    [STATUS] SUCCESS !!!
    [INFO] Executing command 3 of 3 ...
    [INFO] Command arguments : --file=C:/out/TestSuit.appimage --operation=flash --flash-offset=0x80000
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    LINKER FILE:

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    /**********************************************************************************************************************
    * EXAMPLE CODE ONLY
    * -------------------------------------------------------------------------------------------------------------------
    * This Example Code is only intended for illustrating an example of a possible BSW integration and BSW configuration.
    * The Example Code has not passed any quality control measures and may be incomplete. The Example Code is neither
    * intended nor qualified for use in series production. The Example Code as well as any of its modifications and/or
    * implementations must be tested with diligent care and must comply with all quality requirements which are necessary
    * according to the state of the art before their use.
    *********************************************************************************************************************/
    /**********************************************************************************************************************
    * CAUTION - DO NOT EDIT
    * -------------------------------------------------------------------------------------------------------------------
    * Never manually edit the following memory definitions in this file. Only change them in the vLinkGen configuration
    * (/MICROSAR/vLinkGen/vLinkGenMemLayout/vLinkGenMemoryRegion/vLinkGenMemoryRegionBlock) and regenerate the files.
    *********************************************************************************************************************/
    MEMORY
    {
    CoreExceptions_R5SS0_CORE0 : ORIGIN = 0x00000000 , LENGTH = 0x00000060 /* 96 Byte */
    ReservedRegion : ORIGIN = 0x70000000 , LENGTH = 0x00002000 /* 8 KiB */
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    MAP FILE:

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    ******************************************************************************
    TI ARM Clang Linker PC v2.1.2
    ******************************************************************************
    >> Linked Mon Jun 19 09:20:04 2023
    OUTPUT FILE NAME: <TestSuit.out>
    ENTRY POINT SYMBOL: "intvect_CoreExceptions" address: 00000000
    MEMORY CONFIGURATION
    name origin length used unused attr fill
    ---------------------- -------- --------- -------- -------- ---- --------
    CoreExceptions_R5SS0_ 00000000 00000060 00000060 00000000 RWIX
    ReservedRegion 70000000 00002000 00000064 00001f9c RWIX
    SBL 70002000 0002bc00 00000000 0002bc00 RWIX
    StartupCode_FirstExec 7002dc00 00000400 00000400 00000000 RWIX
    Application 7002e000 001d0ff0 000d2230 000fedc0 RWIX
    StartupStack_Shared 701feff0 00001000 00001000 00000000 RWIX
    Variables_Shared 701ffff0 00000010 00000008 00000008 RWIX
    CoreExceptions_R5SS0_ 78200000 00000060 00000000 00000060 RWIX
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

  • 0 in reply to Prashanth Arun
    TI__Mastermind 26025 points

    Hi ,

    Are you on latest SDK ? Can you migrate to latest SDK - 08.06 release and try the same. There was an issue fixed in subsequent releases of the SDK.

    Best Regards,
    Aakash

  • 0 in reply to Aakash Kedia
    Intellectual 255 points

    Hi , I used latest SDK Uart Uniflash tool.py it flashes but not able to load appimage by SBL.... Is SBL looking for specific keywords while booting and what about the RAM address we are using is that mentioned in the below linker seems ok ?

    Please kindly note that we have aligned each and every section with palign(8)

    We have a LED blinking on board if appimage is properly loaded by SBL, LED will blink at 1 sec delay.

     

    Please suggest what could be wrong in linker.

    1) Flashes properly --> No error

    2) Not able to load application by SBL even though palign(8) is used.

    Linker File:

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    /**********************************************************************************************************************
    * EXAMPLE CODE ONLY
    * -------------------------------------------------------------------------------------------------------------------
    * This Example Code is only intended for illustrating an example of a possible BSW integration and BSW configuration.
    * The Example Code has not passed any quality control measures and may be incomplete. The Example Code is neither
    * intended nor qualified for use in series production. The Example Code as well as any of its modifications and/or
    * implementations must be tested with diligent care and must comply with all quality requirements which are necessary
    * according to the state of the art before their use.
    *********************************************************************************************************************/
    /**********************************************************************************************************************
    * CAUTION - DO NOT EDIT
    * -------------------------------------------------------------------------------------------------------------------
    * Never manually edit the following memory definitions in this file. Only change them in the vLinkGen configuration
    * (/MICROSAR/vLinkGen/vLinkGenMemLayout/vLinkGenMemoryRegion/vLinkGenMemoryRegionBlock) and regenerate the files.
    *********************************************************************************************************************/
    MEMORY
    {
    CoreExceptions_R5SS0_CORE0 : ORIGIN = 0x00000000 , LENGTH = 0x00000060 /* 96 Byte */
    ReservedRegion : ORIGIN = 0x70000000 , LENGTH = 0x00002000 /* 8 KiB */
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Map file:

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    ******************************************************************************
    TI ARM Clang Linker PC v2.1.2
    ******************************************************************************
    >> Linked Mon Jun 19 14:03:59 2023
    OUTPUT FILE NAME: <TestSuit.out>
    ENTRY POINT SYMBOL: "intvect_CoreExceptions" address: 00000000
    MEMORY CONFIGURATION
    name origin length used unused attr fill
    ---------------------- -------- --------- -------- -------- ---- --------
    CoreExceptions_R5SS0_ 00000000 00000060 00000060 00000000 RWIX
    ReservedRegion 70000000 00002000 00000064 00001f9c RWIX
    SBL 70002000 0002bc00 00000000 0002bc00 RWIX
    StartupCode_FirstExec 7002dc00 00000400 00000400 00000000 RWIX
    Application 7002e000 001d0ff0 000d2230 000fedc0 RWIX
    StartupStack_Shared 701feff0 00001000 00001000 00000000 RWIX
    Variables_Shared 701ffff0 00000010 00000008 00000008 RWIX
    CoreExceptions_R5SS0_ 78200000 00000060 00000000 00000060 RWIX
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

  • 0 in reply to Prashanth Arun
    TI__Mastermind 26025 points

    Hi ,

    I am assuming you are not rebuilding the SBLs here. If yes, can you check if your OpenSSL version on your system is 1.1.1 and not 3.0.2 ?

    If not, then let's have a debug session for the same.

    Best Regards,
    Aakash

  • 0 in reply to Aakash Kedia
    Intellectual 255 points

    Hi , I am using Pre-Built SBL which comes from SDK and not building the SBL manually.

    We can have a Debug session, Please choose a convenient time and schedule a call. My time is United Kingdom Timezone.

    Thanks & Regards,

    Prashanth Arun

  • 0 in reply to Aakash Kedia
    Intellectual 255 points

    Hi , I have all the setup ready. Shared you a meeting invite for tomorrow 13:30 IST to 14:30 IST.

    We can connect and debug.

    Thanks & regards,

    Prashanth Arun

  • 0 in reply to Prashanth Arun
    TI__Mastermind 26025 points

    Hi ,

    As per the debug call, it seems SBL is initializing and booting the application as expected.

    The original implementation i.e. GEL scripts seems to be initializing a lot of peripherals which is not the case with SBL initialization as these initializations must be handled applications.

    Do let us know if you have any updates.

    Best Regards,
    Aakash

  • 0 in reply to Aakash Kedia
    Intellectual 255 points

    Hi , We took a memory dump and compared between memory when we flashed directly to RAM through CCS and the one which is flashed through SBL.

    Memory dump:

    https://drive.google.com/file/d/1J1jfdNFtCdc2RWUGKEY9WWuh1aNM5bPF/view?usp=sharing

    We see that some of the application sections are having Zero's as shown below:

    Left: Flashed directly to RAM    Right: Flashed through SBL as appimage.

    Is this due to some memory corruptions ?

    Linker file:

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    /**********************************************************************************************************************
    * EXAMPLE CODE ONLY
    * -------------------------------------------------------------------------------------------------------------------
    * This Example Code is only intended for illustrating an example of a possible BSW integration and BSW configuration.
    * The Example Code has not passed any quality control measures and may be incomplete. The Example Code is neither
    * intended nor qualified for use in series production. The Example Code as well as any of its modifications and/or
    * implementations must be tested with diligent care and must comply with all quality requirements which are necessary
    * according to the state of the art before their use.
    *********************************************************************************************************************/
    /**********************************************************************************************************************
    * CAUTION - DO NOT EDIT
    * -------------------------------------------------------------------------------------------------------------------
    * Never manually edit the following memory definitions in this file. Only change them in the vLinkGen configuration
    * (/MICROSAR/vLinkGen/vLinkGenMemLayout/vLinkGenMemoryRegion/vLinkGenMemoryRegionBlock) and regenerate the files.
    *********************************************************************************************************************/
    MEMORY
    {
    CoreExceptions_R5SS0_CORE0 : ORIGIN = 0x00000000 , LENGTH = 0x00000060 /* 96 Byte */
    ReservedRegion : ORIGIN = 0x70000000 , LENGTH = 0x00002000 /* 8 KiB */
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Map file:

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    ******************************************************************************
    TI ARM Clang Linker PC v2.1.2
    ******************************************************************************
    >> Linked Thu Jun 22 15:54:51 2023
    OUTPUT FILE NAME: <TestSuit.out>
    ENTRY POINT SYMBOL: "intvect_CoreExceptions" address: 00000000
    MEMORY CONFIGURATION
    name origin length used unused attr fill
    ---------------------- -------- --------- -------- -------- ---- --------
    CoreExceptions_R5SS0_ 00000000 00000060 00000060 00000000 RWIX
    ReservedRegion 70000000 00002000 00000064 00001f9c RWIX
    SBL 70002000 0003e000 00000000 0003e000 RWIX
    StartupCode_FirstExec 70040000 00000400 00000400 00000000 RWIX
    Application 70040400 001bebf0 000d20f8 000ecaf8 RWIX
    StartupStack_Shared 701feff0 00001000 00001000 00000000 RWIX
    Variables_Shared 701ffff0 00000010 00000008 00000008 RWIX
    CoreExceptions_R5SS0_ 78200000 00000060 00000000 00000060 RWIX
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

  • 0 in reply to Prashanth Arun
    TI__Mastermind 26025 points

    Hi Prashant,

    This is the problem --

    You have mentioned the load and run address separately but there is no copy table to do the copy. ELF loading via any debugger handles the data copy to run address.

    Hence, the data section is not initialized properly --

    RPRC format does not account for load-address (MCUSDK-10150) and hence, the application with different load/run address fails to run in such scenarios. You need to manually copy the data from Flash to RAM.

    Also, do you really need different load and run addresses ? This is a internal RAM based device where same data is consuming double of your RAM space.

    Best Regards,
    Aakash

  • 0 in reply to Aakash Kedia
    Prodigy 250 points

    Hi ,  

    Application Software actually takes care of the data copy to run address during startup.(we are using Vector startup files and it contains the logic to copy data from load address to run address).

    But in memory dump, we can see that load address itself filled with zero after we flash application through SBL. 

    In below image, 0x70112140 represents load address.

    Thanks and Regards

    Aswathy 

  • 0 in reply to Aswathy jayagopi
    TI__Mastermind 26025 points

    Hi ,

    Aswathy jayagopi said:
    Application Software actually takes care of the data copy to run address during startup.(we are using Vector startup files and it contains the logic to copy data from load address to run address).

    Its not the problem..

    The RPRC format only copies the data of the run address. In this case, the run address was empty, because load address contained the data. That is why the RPRC format did not copy any data.

    If you are still doubtful, can you share your RPRC file over E2E message to me personally. I will point out the problem to you.

    Best Regards,
    Aakash

  • +1 in reply to Aakash Kedia
    TI__Mastermind 26025 points

    Hi Aswathy,

    I analyzed your files.

    Looks like the Run Address is 0x70112040 and the size is 0x400. So as part of this Section or RPRC, I don't see this data at 0x70112140.

    Where as I did found the data section, at this location in RPRC -

    This means that the address for this data is 0x70112440.

    Aakash Kedia said:
    (we are using Vector startup files and it contains the logic to copy data from load address to run address)

    Also, this is already part of SBL Load part and hence, you don't need to load it manually again. Try skipping the same, it shall work for you.

    Best Regards,
    Aakash