Hi Ti,
Is is possible to have an example project for sitara Am2634 with FreeRTOS SMP? Or Could you provide a such example project for as a reference or as a basic for our project?
I would really be appreciated if this could happen.
Thank you in advance
Best regards
Hi Aakash
In the link above you wrote:
SMP cannot be supported on R5 Pulsar System because the R5 CPUs do not have shared Cache Memories. I have assigned the ticket to the experts who can share more details on the same
But hier on Syscfg you can see the cache and shared Memory:
Could you give more information about this issue? Can we use FreeRtos SMP on this AM2634 Sitara Chip or not? Could you ask on of your expertise about this issue?
what is meant here with this comment?
due to lack of HW cache coherency support in AM2x R5F subsytems, we do not expect SMP implementation to yield reasonable performance across different....
Could you pleas give a a detailed answer?
Thanks in advance
best regards
