TMS570LC4357: Creating ESM 3.3 L2RAMW double ECC uncorrectable error

Deric Ng

Part Number: TMS570LC4357

Hi Ti users and Experts

I have been trying for a while to create this ESM 3.3 so far, i did not manage trigger it. Have anyone try doing it or is it possible in the first place? Hope to hear from the embedded community and TI.

Previously I have use the safeTI library sl_selftest_sram() to create the esm2.7 error.

Deric

over 2 years ago

0 jagadish gundavarapu over 2 years ago

TI__Guru 73291 points

Hi Deric,

We started working on your issue and we will try to provide an update ASAP.

Thanks & regards,
Jagadish.

0 jagadish gundavarapu over 2 years ago

TI__Guru 73291 points

Hi Deric,

Please refer my recent responded thread:

(+) TMS570LC4357: Writing directly to ECC memory to create 1-bit and 2-bit error in the L2RAMW - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

Thanks & regards,
Jagadish.

0 Deric Ng over 2 years ago in reply to jagadish gundavarapu

Prodigy 208 points

Hi jaga

i have got inconsistent information when i viewed the ECC region. Intially it is 0x0c0c0c0c, when i changed the content of global variable, the ECC does not get updated in the ccs memory browser.

Is there anything wrong?

Note: ECC address is calculated based on the RAM address plus offset of 0x0040_0000)

0 jagadish gundavarapu over 2 years ago in reply to Deric Ng

TI__Guru 73291 points

Hi Deric,

I guess we can close this thread as we are providing support for similar thread in below link:

(+) TMS570LC4357: Writing directly to ECC memory to create 1-bit and 2-bit error in the L2RAMW - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

Thanks & regards,
Jagadish.

0 Deric Ng over 2 years ago in reply to jagadish gundavarapu

Prodigy 208 points

Ok, I will test out the suggested way in the link. Thanks.