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AM2634: Interrupts Register/Bitfield TRM Names Don't Match The Reg Addendum

Part Number: AM2634

Hello,

We have an problem trying to debug interrupts. It is exacerbated by an apparent discrepancy between TRM and Register Addendum (RA) documentation.

Example 1) In this TRM screenshot, the highlighted registers do not exist in the RA. The red items are, I think, the proper register name as mentioned in the RA. Regardless, none of the terms appear in the register list (AM263x.xml) in the debugger.

Example 2) In this TRM screenshot, I cannot find an equivalent register name in the RA nor an entry in the register list.

At the moment, we cannot reasonably debug the interrupt controller and work is stalled. We are prepared to use the Memory Browser to monitor registers from the RA address information but I think it's a tall order to monitor registers we cannot find in the RA nor register database.

I'm happy to be shown that I've misunderstood the documents (?) but, assuming I'm correct, please promptly provide updated RA documentation as a minimum. New registers databases will be very helpful and a new TRM will be ideal. 

  • Hello Kier, 

    You are correct about the discrepancy between the TRM and RA register naming. This is due to the documents being sourced from different areas and I will update them to be the same for the next TRM release. 

    In the short term, could you please list all registers of interest and I will map them to the corresponding register in the Register Addendum.

    Regards,

    Erik

  • Hello Erik,

    Thank you for the offer. To keep the task manageable, for now please can you check and map registers in Section 7.2.7 (7.2.7 PRU-ICSS Local INTC) and its subsections?

    My colleague Vivek () will add any other registers that he thinks he needs but can't find.

    Regards,

    Kier.

  • Hello Kier,

    Here is a table of the registers in the TRM in the order of which they appear in chapter 7.2.7 and the appropriate mapping in the RA.

    AM263x TRM INTC Register Naming Mapped RA Register Naming
    ICSS_INTC_ENABLE_SET_INDEX_REG  PRU_ICSS_INTC_EISR
    ICSS_INTC_HINT_ENABLE_SET_INDEX_REG PRU_ICSS_INTC_HIEISR
    ICSS_INTC_GLOBAL_ENABLE_HINT_REG PRU_ICSS_INTC_GER
    ICSS_INTC_ENA_STATUS_REG<n> PRU_ICSS_INTC_ESR<n>
    ICSS_INTC_CH_MAP_REG<n> PRU_ICSS_INTC_CMR_<n>
    ICSS_INTC_HINT_MAP_REG<n> PRU_ICSS_INTC_HMR<n>
    ICSS_INTC_GLB_PRI_INTR_REG PRU_ICSS_INTC_GPIR
    ICSS_INTC_PRI_HINT_REGj PRU_ICSS_INTC_HIPIR_<n>
    ICSS_INTC_GLB_NEST_LEVEL_REG PRU_ICSS_INTC_GNLR
    ICSS_INTC_NEST_LEVEL_REGj PRU_ICSS_INTC_HINLR_<n>
    ICSS_INTC_ENA_STATUS_REG<n> PRU_ICSS_INTC_SRS<n>
    ICSS_INTC_STATUS_CLR_INDEX_REG PRU_ICSS_INTC_SECR
    ICSS_INTC_ENABLE_CLR_REG<n> PRU_ICSS_INTC_ECR<n>

    Regards,

    Erik

  • Thank you Erik, it's appreciated.