TMS570LC4357: SCI DMA RX issue when same sci module is enabled for TX over DMA

Jaiganesh Jayaraman

Part Number: TMS570LC4357
Other Parts Discussed in Thread: TMS570LS3137

Hello,

I am seeing the exact problem raised in the below link except that the controller P/N is TMS570LS3137 and I don't see any solution provided in the link.

https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1041094/tms570lc4357-sci-dma-rx-issue-when-same-sci-module-is-enabled-for-tx-over-dma

I have configured SCI-1(Multi-buffered, 8 bytes) for both RX and TX DMA. DMA CH-0 is for RX and DMA CH-1 for TX with AIM mode set to FALSE. I am trying to transfer 4 frames of 8 bytes with 2 elements (32_bit transfer) in each frame.

Is it that the SCI TX DMA always getting triggered leaving no room for RX DMA despite priority is high for Rx DMA channel?

I even tried with low priority for TX DMA CH-1 but it didn't work either. Also, I was expecting the DMA CH-1 will get disabled after a block transfer of 32 bytes (4 frames of 8 bytes) but it is always enabled.

Any help?

Thanks,

Jai

over 2 years ago

0 jagadish gundavarapu over 2 years ago

TI__Guru 73361 points

Hi Jai,

Recently i created one FAQ for mutli-buffered mode of SCI. Can you please have a look on this FAQ and it consists of one example project as well.

(+) [FAQ] RM48L952: How to perform 8 Byte transfer in SCI Multi-buffered Mode using DMA - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

Thanks & regards,
Jagadish.

0 Jaiganesh Jayaraman over 2 years ago in reply to jagadish gundavarapu

Prodigy 200 points

Hi,

As I mentioned in the query, one element transfer size is 32-bit only. Two elements of 32_bit size in a frame and three more such frames to complete 32-bytes transfer.

I am testing my code using 2 dev boards with the identical builds running on both the boards. With both Tx DMA and Rx DMA enabled, I am seeing this problem. So, If I stop transmission and enable only reception on one board, I am receiving the data getting transmitted from another board without any miss.

Could you please confirm for my problem, I need to go for two DMA channels each with 1 element of 32_bit instead of 1 DMA channel with 2 elements of 32_bit?

Just to confirm SCI_RXD is also 0xFFF7E464 which is again not divisible by 8. Still, I have no problem in reception with same 2 element transfer per frame of 32_bit size.

Thanks,

Jai

0 Jaiganesh Jayaraman over 2 years ago in reply to Jaiganesh Jayaraman

Prodigy 200 points

In DMA CH setting for SCI TX, AIM was 'ON' which was causing the issue. When I disabled it, it works fine with single DMA channel for Tx.

Thanks,

Jai