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GNU GCC compliance for __attribute__((pcs("aapcs"))) of ARM Optimizing C/C++ Compiler v18.1.0.LTS

Hi,

we have a new project that requires the usage of the TI ARM Optimizing C/C++ Compiler v18.1.0.LTS

In the existing code base that needs to be compiled with this compiler, we rely on a dedicated GCC-specific attribute to adjust the calling convention:

  • __attribute__((pcs("aapcs")))

when using the GCC compilation option -mfloat-abi=hard for our library.

While checking the User Manual of the TI compiler, I could not find any support or alternative for this attribute.

Currently, we control the attribute usage via a CALLING_CONVENTION define as follows:

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#ifdef __ARM_EABI__
#ifdef __ARM_PCS_VFP
#define CALLING_CONVENTION __attribute__((__pcs__("aapcs")))
#else /* !__ARM_PCS_VFP */
#define CALLING_CONVENTION
#endif
#else /* !__ARM_EABI__ */
#define CALLING_CONVENTION
#endif
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

So, our problem is:
  • When a translation unit is compiled with -mfloat-abi=hard, the GCC compiler emits floating-point instructions and uses FPU-specific calling conventions.
  • AEABI intrinsic functions, on the other hand, *must* use soft-float calling conventions, no matter the setting used for -mfloat-abi.
  • Since the GCC linker will not link objects compiled with differing -mfloat-abi options, the __attribute__((__pcs__("aapcs"))) allows the programmer to pin-point, to the compiler, which functions are enforced to use the soft-float convention, even if -mfloat-abi=hard.
Now, the question is:
  • Since the TI ARM C/C++ compiler does not support the __pcs__ attribute, how can we achieve the same effect with it, as it is achieved with GCC.

Could you please provide advise on how to realize this via the configuration means or flags provided via the TI C/C++ for ARM?

Thanks and best regards

  • please provide advise on how to realize this via the configuration means or flags provided via the TI C/C++ for ARM?

    Unfortunately, there is no method by which you can control, on a function by function basis, whether vector floating-point (VFP) co-processor instructions are used.  To see what support the compiler provides, please search the TI ARM compiler manual for the sub-chapter titled VFP Support.

    Thanks and regards,

    -George

  • Hi George,

    thank you for your fast answer. It is very welcome.

    Then I will find some workaround for this issue by adapting our libraries and components.

    Thanks and best regards,

    Philipp