Other Parts Discussed in Thread: HALCOGEN
We are doing a 4MB DMA from flash to the emif bus using the DMA controller in the TMS570LC4357.
We only need to do the DMA once and want to just have the processor spin until the DMA completes. On our previous TMS570 processor we used CTCOUNT and just waited for it to count down to zero.
On the TMS570LC4357 the DMA happens fine but CTCOUNT has the value of 0xF8DAF7E6 and never changes or decrements at all.
I’ve looked in the reference manual for TMS570LC43x and according to Table 20-108 it seems like CTCOUNT should still function similarly.
Can you help me figure out either if I’m either using CTCOUNT incorrectly or tell me an alternate way to use the registers in the DMA controller to know when the DMA transfer is complete? FWIW I tried using DMASTAT instead of CTCOUNT and it seemed to work. My concern is that according to polling DMASTAT is that it took 721 milliseconds to do the 4MB DMA which might be a problem for our timeline.
Below is a code snippet that shows setting up the DMA channel and initiating the transaction. The while loop never exits because CTCOUNT doesn’t change.
Thank you.
g_dmaCTRL g_dmaCTRLPKT; /* DMA control packet */
/* Set up the DMA transfer */
g_dmaCTRLPKT.SADD = Source_Adrs; /* Source address (beginning of Flash) */
g_dmaCTRLPKT.DADD = BuffersBase_Adrs; /* Destination address (FPGA buffer) */
g_dmaCTRLPKT.CHCTRL = 0; /* DMA channel number to use */
/* Transfer size is (Frame Count * Element Count * Word Size) */
g_dmaCTRLPKT.FRCNT = NumWords / 0x1000; /* Frame count */
g_dmaCTRLPKT.ELCNT = 0x1000; /* Element count */
g_dmaCTRLPKT.ELDOFFSET = 0; /* Element destination offset */
g_dmaCTRLPKT.ELSOFFSET = 0; /* Element source offset */
g_dmaCTRLPKT.FRDOFFSET = 0; /* Frame destination offset */
g_dmaCTRLPKT.FRSOFFSET = 0; /* Frame source offset */
g_dmaCTRLPKT.PORTASGN = PORTA_READ_PORTA_WRITE; /* Port assignment */
g_dmaCTRLPKT.RDSIZE = ACCESS_32_BIT; /* Read size */
g_dmaCTRLPKT.WRSIZE = ACCESS_32_BIT; /* Write size */
g_dmaCTRLPKT.TTYPE = BLOCK_TRANSFER; /* Block transfer */
g_dmaCTRLPKT.ADDMODERD = ADDR_INC1; /* Increment the read address */
g_dmaCTRLPKT.ADDMODEWR = ADDR_INC1; /* Increment the write address */
g_dmaCTRLPKT.AUTOINIT = AUTOINIT_OFF; /* Auto-initialization off */
/* Have the driver initialize the DMA structure in DMA control memory */
dmaSetCtrlPacket(DMA_CH0, g_dmaCTRLPKT);
/* Enable the DMA channel to be triggered by software */
dmaSetChEnable(DMA_CH0, DMA_SW);
/* Start the transfer */
dmaEnable();
/* Wait for the transfer to complete */
while (dmaRAMREG->WCP[DMA_CH0].CTCOUNT > 0)
{
}
dmaDisable();
