TM4C1290NCPDT: The EPI bus interface

James Calvin

Part Number: TM4C1290NCPDT

I am using the EPI bus on the TM4C1290NCPDT. I have two peripherals on the bus. One is asynchronous, it is the TL16C752. The other is a an FPGA. The FPGA has legacy code and is a synchronous interface.

Can I use the EPI bus in the asynchronous mode (host 16 mode) and still bring out the clock and use the clock for the FPGA interface? Is there any information on the timing of the clock in relation to the the rest of the bus when the EPI bus is in the asynchronous mode ?

Or can I reconfigure the EPI bus on the fly without stopping the clock?

over 2 years ago

0 Charles Tsai over 2 years ago

TI__Guru**** 191466 points

Hi,

I answered your colleague's question here. https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1269383/tm4c1290ncpdt-epi-host-mode-clocking-part2

The Host-Bus mode is designed to interface with an asynchronous device. The clock is not required for asynchronous devices. There is no relationship guaranteed relationship between the brought out clock and the rest of the signals despite being brought out for observation.

You might want to check General Purpose mode if this mode will work for your custom FPGA.

■ General custom interfaces of any speed.
The configuration allows for choice of an output clock (free-running or gated), a framing signal (with
frame size), a ready input (to stretch transactions), an address (of varying sizes), and data (of varying
sizes). Additionally, provisions are made for separating data and address phases.

Arm-based microcontrollers

Arm-based microcontrollers forum

TM4C1290NCPDT: The EPI bus interface