AM2634: Flash Driver Bug

Hello

For our own hardware we took the Sitara AM263x Eval Kit as a template (TMDSCNCD263)

We had unreliable Flash readbacks on our own hardware and made the same tests on the Eval Kit with similar results. We changed the SPI flash on our board also to S25FL128 to be able to use the same adjustments as on the Eval Kit.

We faced the same or similar issues.

How we tested on the Eval Kit

1) Tools: CCS1250. SDK: mcu_plus_sdk_am263x_09_00_00_35

2) in CCS: 

    File -> Import -> C/C++ -> CCS Project

    Next

    Search Directory: /opt/ti/mcu_plus_sdk_am263x_09_00_00_35/examples/drivers/qspi/qspi_flash_diag/am263x-cc/r5fss0-0_freertos/

    Finish

3) We used all the default syconfig adjustments and modified the test.

    Reason for modification: Only 256 Bytes are written and only incrementing values are used in the example.

    Modification:

          We used the uart_uniflash.py script to download a random binary with 16KB to address 0 on the Eval kit and read it back using the same flash read routine as on the example from step 2

4) Observation:

   On the first read

00000000  01 f0 50 a1 49 55 76 c3 40 de dd 0d 89 8e 83 4f
00000010  04 18 33 9c 4b ae 98 a4 de 47 7c 40 c4 0c d5 eb
00000020  f7 13 9f 20 5d e5 07 53 52 f9 61 b6 ef 6d 4f 2b

  while the random binary is (file generated on the PC) was:

marco@HP-ZBook-15-G6:/tmp$ hexdump -C dummy
00000000  df f0 50 a1 49 55 76 c3  40 de dd 0d 89 8e 83 4f  |..P.IUv.@......O|
00000010  04 18 33 9c 4b ae 98 a4  de 47 7c 40 c4 0c d5 eb  |..3.K....G|@....|
00000020  f7 13 9f 20 5d e5 07 53  52 f9 61 b6 ef 6d 4f 2b  |... ]..SR.a..mO+|
00000030  8f bb a5 82 96 bd 48 d9  d4 38 cb da 18 80 90 4d  |......H..8.....M|

 after reading again on the Eval Kit we got the right data we thought:

00000000  df f0 50 a1 49 55 76 c3 40 de dd 0d 89 8e 83 4f
00000010  04 18 33 9c 4b ae 98 a4 de 47 7c 40 c4 0c d5 eb

It turns out that also after a 2nd read we had wrong CRCs. The flash readback was unreliable.

What we tried:

  Reduced the SPI clock significantly (80MHz -> 10MHz) and used 1S-1S-1S mode only. This way the flash readback passed (tested with CRC checksum).

We would be glad if an TI engineer can try to reproduce this issue. We are happy to share our test application as it would help to ease testing (especially CRC checksum etc.)

 Thank you in advance