TMS570LC4357: Why would disabling the cache cause a hardfault?

Mark Steele

Part Number: TMS570LC4357

I have a project running on the TMS570LC4357 using FreeRTOS. Everything runs fine when I have the cache enabled. However, I disabled the cache to try to debug an issue, but now the MCU is hardfaulting when the cache is disabled. I know the cache being enabled/disabled is the issue here.

I know we lose out in speed if the cache is disabled, but as far as I know we should be able to run still. Can anyone tell me why we would hardfault when the cache is disabled?

over 1 year ago

0 jagadish gundavarapu over 1 year ago

TI__Guru 69771 points

Hi Mark,

Is it possible for you to share your project? This would be helpful for me to debug the issue at my end.

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Thanks & regards,
Jagadish.

0 Mark Steele over 1 year ago in reply to jagadish gundavarapu

Intellectual 330 points

Unfortunately I can't. I was more curious if there was an obvious thing I was missing. All I do is remove the _cacheEnable_(); function. Is there anything else I need to do?

+1 jagadish gundavarapu over 1 year ago in reply to Mark Steele

TI__Guru 69771 points

Hi Mark,

Mark Steele said:
Unfortunately I can't. I was more curious if there was an obvious thing I was missing. All I do is remove the _cacheEnable_(); function. Is there anything else I need to do?

I never saw any issue as similar you mentioned.

I need at least a sample project with the issue you are talking about to debug the issue at my end.

As of now i can only provide you the below troubleshooting exceptions FAQ:

(+) [FAQ] TMS570LC4357: Troubleshooting the Abort Exceptions on Hercules Devices - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

And also verify below FAQ:

(+) [FAQ] TMS570LC4357: What are the differences among the memory attributes, memory types and cache policy in MPU settings? - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

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Thanks & regards,
Jagadish.