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RM44L520: void checkClockMonitor(void) in sys_selftest.c didn't pass /* Wait till oscillator fail flag is set */

Part Number: RM44L520
Other Parts Discussed in Thread: HALCOGEN,

Hi All,

I need to use the clock monitoring during running MCU.

But the function 'void checkClockMonitor(void)' in sys_selftest.c is not working.

It doesn't pass 'Wait till oscillator fail flag is set'

There are similar questions in the TI Forum, but they seem to have not been solved.

(https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/845782/ccs-tms570ls3137-checkclockmonitor-in-sys_selftest-c-from-halcogen---code-freezes-waiting-for-oscillator-to-fail)
(e2e.ti.com/.../oscillator-fault-flag-always-set)

/** @fn void checkClockMonitor(void)
*   @brief Check clock monitor failure detection logic.
*
*   This function checks clock monitor failure detection logic.
*/
/* SourceId : SELFTEST_SourceId_035 */
/* DesignId : SELFTEST_DesignId_028 */
/* Requirements : HL_SR394 */
void checkClockMonitor(void)
{
    uint32 ghvsrc_bk;

    /* Enable clock monitor range detection circuitry */
    systemREG1->CLKTEST |= 0x03000000U;

    /* Backup register GHVSRC */
    ghvsrc_bk = systemREG1->GHVSRC;

    /* Switch all clock domains to HF LPO */
    systemREG1->GHVSRC = 0x05050005U;

    /* Disable oscillator to cause a oscillator fail */
    systemREG1->CSDISSET = 0x1U;

    /* Wait till oscillator fail flag is set */
    /*SAFETYMCUSW 28 D MR:NA <APPROVED> "Hardware status bit read check" */
    while((systemREG1->GBLSTAT & 0x1U) == 0U)
    {
    } /* Wait */

    if((esmREG->SR1[0U] & 0x800U) != 0x800U)
    {
        selftestFailNotification(CHECKCLOCKMONITOR_FAIL1);
    }
    else
    {
        /* Clear ESM flag */
        esmREG->SR1[0U] = 0x800U;

        /* Disable clock monitor range detection circuitry */
        systemREG1->CLKTEST &= ~(0x03000000U);

        /* Enable oscillator */
        systemREG1->CSDISCLR = 0x1U;

        /* Wait until oscillator is enabled */
        /*SAFETYMCUSW 28 D MR:NA <APPROVED> "Hardware status bit read check" */
        while((systemREG1->CSVSTAT & 0x3U) == 0U)
        {
        } /* Wait */

        /* Clear oscillator fail flag and PLL slip flag if any*/
        systemREG1->GBLSTAT = 0x301U;

        /* Switch back all clock domains */
        systemREG1->GHVSRC = ghvsrc_bk;
    }
}