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MSPM0G3507: MSPM0G3507

Laurent Steyaert
Prodigy 30 points
Part Number: MSPM0G3507
Other Parts Discussed in Thread: SYSCONFIG

Question regarding: MSPM0G3507

https://www.ti.com/lit/ug/slau846a/slau846a.pdf?ts=1705572247731&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FMSPM0G3507

 

We need

-a.  TIMA0 CCP0 85KHz and 50 percent duty cycle with risedelay on 1st output pin.

-b. The complement of a. but with risedelay on 2nd output pin.

- c. TIMA1 CCP0 synchronous, 50 percent duty cycle and phase shifted 0...180 degrees compared to a. risedelay at rising edge on 3th output pin.

-d. The complement of c. but with risedelay at rising edge 4th output pin.

 

I see that using edge aligned or center aligned PWM, it is possible to output the complementary pair with dead bands (next pictures).

 

  • 0
    TI__Genius 12702 points

    Hi, 

    You need add two TIMA0 CCP0 and TIMA1 CCP0's complement outputs with dead band based on 25.2.5.2.3 in TRM, right?

    Using two function to enable and set phase load function in dl_timera.h:

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    DL_TimerA_enablePhaseLoad(GPTIMER_Regs *gptimer)
    DL_TimerA_setPhaseLoadValue(GPTIMER_Regs *gptimer, uint16_t value)
    DL_Timer_setCounterValueAfterEnable(GPTIMER_Regs *gptimer, DL_TIMER_COUNT_AFTER_EN cvae)
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    And in sysconfig, you need to configure these:

    Regards,

    Helic