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TMS570LC4357: ADC groups channel sequence using Enhanced Channel Selection Mode

Pratik Bhagat
Prodigy 50 points
Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Hello Team,

We are using TMS570LC4357 evaluation board in which we are testing internal ADC.

So far we have tried to get data in single/continuous conversion mode and got the results as intended.

We also explored multiple channel selection in group1, group2 and event group.

My doubt here is since this channels are converted one after other in sequence, i.e 0,1,2,3,4,...

But we want to have user choice sequence i.e. 0,5,6,2,1,3,4... etc.

We got to know from TRM that using Enhanced Channel Selection and configuring the LUT it is possible.

Could you please provide some example code on how to do it.

One more doubt using the above feature is it possible to sequence between two group channels like shown in below group

Channel 

seq

 0 0 1 4 1 5
Group Grp1 Grp2 Grp1 Grp2 Grp1 Grp2

Regards,

Pratik

  • 0
    TI__Guru 70551 points

    Hi Pratik,

    Pratik Bhagat said:

    But we want to have user choice sequence i.e. 0,5,6,2,1,3,4... etc.

    We got to know from TRM that using Enhanced Channel Selection and configuring the LUT it is possible.

    Unfortunately, there is not ready example for this. However, you can implement this one with the Enhanced channel selection mode.

    Again, the main purpose of enhanced channel selection mode is for to do the conversions on external channels upto 1024. Please refer below thread:

    (10) [FAQ] TMS570LC4357-EP: What is meant by this reference to "1024 Off-Chip Channels"? - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

    But if we made EXT_CHN_MUX_SEL bits as 0 then only the internal channel conversions will happens based on the value of NT_CHN_MUX_SEL bits.

    For example, i am assuming that you want to do the 0,5,6,2,1,3 and 4 channels conversion with a single trigger then follow below steps.

    1. SET any of the 7 bits in the ADG1SEL register. Because here we want to convert 7 channels with single trigger right so we should set- 7 bits in the ADG1SEL register. If you want to convert only a single channel with single conversion then you should need to SET only 1 bit in this register.

    2. Now set G1_MAX_COUNT register with number of conversions you needed. That means if you set this register with 0 then only one time conversion will happen for all 7 channels, or else if you set this register with 1 then 2 times the group conversion will happens and so on.

    3. Now prepare the LUT and program it to the corresponding LUT area.

    You have to program LUT as below for above required sequence.

    4. After doing above configurations and now if you provide the trigger then the conversion sequence will be done in the required sequence.

    Also refer the section in TRM "Example ADC Conversion Sequence Using Enhanced Channel Selection Mode" to understand more details.

    Just try from your end and if you get any difficulty to build this application then i will further assist you on this issue.

    --
    Thanks & regards,

    Jagadish.

  • 0 in reply to jagadish gundavarapu
    Prodigy 50 points

    Hi Jagadish,

    Thank you for quick response.

    • Now prepare the LUT and program it to the corresponding LUT area.Here what exactly we have to program. Could you just brief this part a bit more.
  • 0 in reply to Pratik Bhagat
    TI__Guru 70551 points

    Hi Pratik,

    The LUT area for ADC1 instance will start from the 0xFF3E2000 and for ADC2 instance it will start from 0xFF3A2000.

    From this start address this LUT table will occupies total of 96 words, first 32 entries of 32bit words are for event group and second 32 entries 32bit words are for group-1 and third 32 entries of 32bit words are for group-2.

    For example, if you are aiming to convert ADC1 and Group-1 channels then your Lookup table should start from (0xFF3E2000 + 32 * 4) that is  0xFF3E2080 address.

    Now for example if you want to convert 0,5,6,2,1,3 and 4 channels in this Group-1 then you should program LUT table something as below:

    Address        -   Value

    0xFF3E2000 -   0x00000000              /*Channel-0*/

    0xFF3E2004 -   0x00000005              /*Channel-5*/

    0xFF3E2008 -   0x00000006              /*Channel-6*/

    0xFF3E200C -   0x00000002              /*Channel-2*/

    0xFF3E2010 -   0x00000001              /*Channel-1*/

    0xFF3E2014 -   0x00000003              /*Channel-3*/

    0xFF3E2018 -   0x00000004              /*Channel-4*/

    --
    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    Prodigy 50 points

    Hi Jagadish,

    I have configured LUT and followed steps as shown above.

    Still I could not see proper sequence of channel.

    Even I noticed that in normal scenario without using LUT, also channels are not read in sequence.

    Is something to be configured while reading ADC channels?

    Could you help me here.

    Also you said in previous response that : 

    For example, if you are aiming to convert ADC1 and Group-1 channels then your Lookup table should start from (0xFF3E2000 + 32 * 4) that is  0xFF3E2080 address.
    But in the LUT table first address is 0xFF3E2000 -   0x00000000              /*Channel-0*/. 

    Could you please clarify this point.

    Thanks,

    Pratik

  • 0 in reply to Pratik Bhagat
    Prodigy 50 points

    Hi Jagadish,

    During further debug on the issue.

    I noticed that below mentioned register address of TRM are not matching with actual controller's mapping in IDE.

    Here is the attached screenshot of both.

            

                           TRM                                                                                         CCS IDE debug mode

    Please note that I have selected correct controller.

    Also I am facing weird issue. I am not able to set value to ADG1MAXCOUNT register.

    Although I am able to set values to all other registers and even ADG2MAXCOUNT register(as shown in right side image).

    In code I am trying to write 0x7h to ADG1MAXCOUNT and 0xCh to ADG2MAXCOUNT.

    But as shown in right side image, ADG2MAXCOUNT is set with correct value, but ADG1MAXCOUNT remains unchanged.

    Could you please check on this.

    Thanks,

    Pratik

  • 0 in reply to Pratik Bhagat
    TI__Guru 70551 points

    Hi Pratik,

    Okay, i will try to create an example at my end for this requirement.

    --
    Thanks & Regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    TI__Guru 70551 points

    Hi Pratik,

    I created one example project for your reference.

    ADC_Enhanced_Channel_Selection_Demo_LC4357.zip

    Here is the final test result:

    As you can see my final conversion result is as per the LUT order i gave. I also tested this sequence by giving 0v and 3.3v to the channel-1 and the result was reflected exactly at the 5th conversion i.e. adc_data[4].

    Please take it as reference and verify with your code.

    --
    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    Prodigy 50 points

    Hi Jagadish,

    Thank you for providing the example. It has helped in understanding the enhance channel selection feature.

    I have made changes according to the example project. But in my case when I enable Enhance Channel Selection mode, it not taking the channels selected, instead it is taking all channels from 0 to 16.

    One observation is ADG1INTCR register becomes 0, after we set ADG1CHNSELMODECTRL = 0x0A;

    But in your example code it shows the number of channels selected.

    Also ADG1INTFLG register is 0x0B, which implies overrun.

    Could you please guide me here.

    Thanks,

    Pratik

  • 0 in reply to Pratik Bhagat
    TI__Guru 70551 points

    Hi Pratik,

    Pratik Bhagat said:
    I have made changes according to the example project. But in my case when I enable Enhance Channel Selection mode, it not taking the channels selected, instead it is taking all channels from 0 to 16.

    It won't do conversion for all the channels; it will do conversion for only selected channels in the user defined order in the LUT.

    Maybe you are confusing with the data storage in RAM, actually in RAM the ID field will not move only the CURRENT_COUNT will get move into the RAM memory.

    So, the ID filed in the RAM storage will always in sequence only 0, 1, 2, 3 etc but the actual channel ID's should again get from the LUT table like what i am doing in the example:

    For your understanding, see this example:

    On my initial testing i have 7 ADC channels from channel-0 to channel-6

    Now i did test and verified the data in the RAM

    As you can see the ID field in RAM always in sequence only, i mean ID field is showing numbers form 0 to 6 because it is not actual ID and it is CURRENT_COUNT.

    If you verify after replacing the CURRENT_COUNT with actual ID's there you can see the proper sequence.

    As you can see here the channel-1 have result 0 because i grounded that channel and all other channels are just in floating that is why we got some value on other channels. Now what i am doing is that i am removing that grounded channel and want to verify the result.

    Now i am removing the ADC channel-1 from HALCoGen:

    Now as you can see the result is now for 6 channels only. But ID's looks in sequence as before but as i said they are not actual ID's they are just CURRENT_COUNT numbers and they will always in sequence only.

    If you verify carefully that CURRENT_COUNT with 4 and result 0 is replaced by other channel.

    Even you can verify same thing after in final result buffer also.

    --
    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    Prodigy 50 points

    Hi Jagadish, 

    Thanks for your detailed explanation, I understood that number sequence for ID and CURR_COUNT.

    But in my case, the channels are exceeding the selected channels.
    Even I have verified with the below for loop:

    For example, in your case since you selected 6 channels, your seq will go from 0 to 5, but in my case, i have selected 8 channels, but loop goes till 16, because my channel select register is 0 before going to getADCData().

    Please guide me, why the channel select register is getting cleared.

    Thanks,

    Pratik

  • +1 in reply to Pratik Bhagat
    TI__Guru 70551 points

    Hi Pratik,

    What is the memory size you allocated at BNDB.

    It should be minimum size of the number of channels we are going to convert. Please keep it at least as 16 if you are converting 16 channels.

    --
    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    Prodigy 50 points

    I corrected this and it worked.

    Thanks Jagadish for all your help.