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AM2634: Off-chip trace configuration in non-dev bootmodes

Part Number: AM2634
Other Parts Discussed in Thread: TMDSHSECDOCK, TMDSCNCD263

Tool/software:

Hi Team,

we have a AM2634 (Currently with eval-board TMDSCNCD263 + TMDSHSECDOCK) and want to use the ARM parallel trace interface to monitor real time data.

After consulting the manual and other threads in this forum, we configured IOMUX, Trace Clock, and the ARM trace components (e.g. TPIU pattern generator for a first test), but we never got any output on the trace signals TRC_CLK, TRC_DATA0, TRAC_DATA1, etc.

Then we found a hint in the Lauterbach CMM scripts (e.g., tmdscncd263-cr5-ss0_sieve_parallel_offchip_trace.cmm from repo.lauterbach.com/scripts.html):

;    * SW3.1=OFF, SW3.2=ON, SW3.3=OFF, SW3.4=ON
;      This is the only boot mode where I could get the off-chip trace to work.

And that appears to be correct: We get trace output in this boot mode, but not in others!

However, this boot mode is not documented in the manual, and the system appears to be halted early in the boot process.  We want to use the trace output when running tests with regular production parts, so we can not use this boot mode.

Do you know how to enable trace output in "normal" boot modes (e.g. QSPI)?  Is this a security issue?

Thanks in advance.

Best regards,

Moritz