Tool/software:
hello,
wanted to clear one issue from the AM263Px Sitara Microcontrollers Technical Reference Manual (Rev. B) .
trying to understand how to configure DMA request on filter element match scenario:

in acceptance filtering chapter written as below:

but in SFEC field inside the Standard Message ID Filter Element Field Descriptions chapter there is no explanation about the generation of pulse at filter event.

the question is:
is it possible to configure store in Rx FIFO0/Rx FIFO1 and generation of pulse at filter event (DMA request)?
is it possible to configure store in Rx Buffer and generation of pulse at filter event (DMA request)?
is SFID2[8-6] configures the pins to DMA request as below ?
000 - MCAN0_FE_INTR_0
001 - MCAN0_FE_INTR_1
010 - MCAN0_FE_INTR_2
011 - MCAN0_FE_INTR_3
100 - MCAN0_FE_INTR_4
101 - MCAN0_FE_INTR_5
110 - MCAN0_FE_INTR_6

thank you ,
Maxim

