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Tool/software:
hello,
wanted to clear one issue from the AM263Px Sitara Microcontrollers Technical Reference Manual (Rev. B) .
trying to understand how to configure DMA request on filter element match scenario:
in acceptance filtering chapter written as below:
but in SFEC field inside the Standard Message ID Filter Element Field Descriptions chapter there is no explanation about the generation of pulse at filter event.
the question is:
is it possible to configure store in Rx FIFO0/Rx FIFO1 and generation of pulse at filter event (DMA request)?
is it possible to configure store in Rx Buffer and generation of pulse at filter event (DMA request)?
is SFID2[8-6] configures the pins to DMA request as below ?
000 - MCAN0_FE_INTR_0
001 - MCAN0_FE_INTR_1
010 - MCAN0_FE_INTR_2
011 - MCAN0_FE_INTR_3
100 - MCAN0_FE_INTR_4
101 - MCAN0_FE_INTR_5
110 - MCAN0_FE_INTR_6
thank you ,
Maxim
Hello Maxim,
In the SFEC field inside the Standard Message ID Filter Element Field Descriptions chapter, I believe the terminology "Set priority" is equivalent to generating the referenced pulse filter event.
1/2) This is dependent on the value configured in the SFEC Field as described by the table. I don't believe Set Priority and Store in RX Buffer is a valid option, only FIFO[0:1].
3) These are the MCAN_FE (Filter Event) Interrupt Router options and can be routed to DMA_XBAR to generate DMA request. I will also loop in the SW expert here to provide any additional feedback regarding configuration requirements here.
Best Regards,
Zackary Fleenor
Hello Zackary,
about store in Rx Buffer and generation of pulse at filter event (DMA request)
in Acceptance Filtering chapter written
but i cant find this configuration in the SFEC field in Standard Message ID Filter Element .
also please let me know about the priority if its for DMA or for interrupt request,
as i understand set priority is configuration that sets HPM[8] bit to '1' in the MCAN_IR register.
Thank you,
Maxim
Hello Maxim,
Can you confirm if your exact requirement is to store the incoming message in the Rx buffer and generate ICLK pulse at the event?
Best regards,
Aswathi
Hello Aswathi
I am in FW design stage , so i want to understand what are my possibilities.
can i store the incoming message in the Rx buffer and generate ICLK pulse at the event
and store other incoming message in the Rx FIFO0/1 and generate ICLK pulse at the event in other filter element ?
Hi Maxim,
Apologies for the delay. I have looped in another developer who is currently working on MCAN with DMA. He might be able to provide insights into this.
Best regards,
Aswathi
Hi Maxim,
If your incoming messages are stored in RXFIFO then you need to generate ICLK pulse for that specific filter element.
Hi,
Managed to generate a DMA trigger (filter event pulse) when using a dedicated Rx buffer!
as I understand from the AM263Px user manual & MCAN user manual (BOSCH), filter event pulse can be generated only if using a dedicated Rx buffer, need to understand if there is any algorithm to clear the new data flag (not by the HOST CPU) register (NDAT1/NDAT2) when using DMA ?
Hi,
No there is no other algorithm to clear the new data flag. We need to use new data flag register (NDAT1/NDAT2) only.