RM57L843: MPU make data abort exception after flash the application through the bootloader

Hi Kamyar,

Can you please share the linker cmd files for both bootloader and application? So that i can quickly verify them.

--
Thanks & regards,
Jagadish.

Hi Jagadish,

here is the bootloader linker file : 

/*----------------------------------------------------------------------------*/
/* Linker Settings                                                            */

--retain="*(.intvecs)"

/* USER CODE BEGIN (1) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Memory Map  */
MEMORY
{
/* USER CODE BEGIN (2) */
/* USER CODE END */

    VECTORS    (X)   : origin=0x00000000 length=0x00000020 vfill = 0xffffffff
    FLASH0     (RX)  : origin=0x00004000 length=0x001FBFE0 vfill = 0xffffffff
    FLASH1     (RX)  : origin=0x00200000 length=0x00200000 vfill = 0xffffffff
    SRAM       (RWX) : origin=0x08002000 length=0x0002D000
    STACK      (RW)  : origin=0x08000000 length=0x00002000

/* USER CODE BEGIN (3) */
/*
    ECC_VEC (R)  : origin=0xf0400000 length=0x4 ECC={algorithm=algoL2R5F021, input_range=VECTORS }
    ECC_FLA0 (R) : origin=0xf0400000 + 0x4 length=0x3FFFC ECC={algorithm=algoL2R5F021, input_range=FLASH0 }
    ECC_FLA1 (R) : origin=0xf0440000 length=0x40000 ECC={algorithm=algoL2R5F021, input_range=FLASH1 }
*/
#if 0
    ECC_VEC  (R) : origin=(0xf0400000 + (start(VECTORS) >> 3))
                   length=(size(VECTORS) >> 3)
                   ECC={algorithm=algoL2R5F021, input_range=VECTORS}

    ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0)  >> 3))
                   length=(size(FLASH0)  >> 3)
                   ECC={algorithm=algoL2R5F021, input_range=FLASH0 }

    ECC_FLA1 (R) : origin=(0xf0400000 + (start(FLASH1)  >> 3))
                   length=(size(FLASH1)  >> 3)
                   ECC={algorithm=algoL2R5F021, input_range=FLASH1 }
#endif
/* USER CODE END */

}

/* USER CODE BEGIN (4) */
ECC
{
    algoL2R5F021 : address_mask = 0xfffffff8 /* Address Bits 31:3 */
                   hamming_mask = R4         /* Use R4/R5 build in Mask */
                   parity_mask  = 0x0c       /* Set which ECC bits are Even and Odd parity */
                   mirroring    = F021       /* RM57Lx and TMS570LCx are build in F021 */
}
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */
SECTIONS
{
/* USER CODE BEGIN (5) */
/* USER CODE END */
   .intvecs : {} > VECTORS

   /* The toot directory is \Debug */
   flashAPI:
   {
     .\source\Fapi_UserDefinedFunctions.obj (.text)
     .\source\bl_flash.obj (.text)
     --library= "c:\ti\Hercules\F021 Flash API\02.01.01\F021_API_CortexR4_LE_L2FMC.lib" (.text)
   } palign=8 load = FLASH0 |FLASH1, run = SRAM, LOAD_START(apiLoadStart), RUN_START(apiRunStart), SIZE(apiLoadSize)

   .text    : {} palign=8 > FLASH0 |FLASH1 /*Initialized executable code and constants*/
   .const   : {} palign=8 load=FLASH0 |FLASH1, run = SRAM, LOAD_START(constLoadStart), RUN_START(constRunStart), SIZE(constLoadSize)   /*Initialized constant data (e.g. const flash_sectors[..] = )*/
   .cinit   : {} palign=8 > FLASH0 |FLASH1   /*Initialized global and static variables*/
   .pinit   : {} palign=8 > FLASH0 |FLASH1
   .data    : {} > SRAM
   .bss     : {} > SRAM
   .sysmem  : {} > SRAM

/* USER CODE BEGIN (6) */

/* USER CODE END */
}

/* USER CODE BEGIN (7) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Misc                                                                       */

/* USER CODE BEGIN (8) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/

And here is the Application linker file : 

/*----------------------------------------------------------------------------*/
/* Linker Settings                                                            */

--retain="*(.intvecs)"

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
    /* These configuration settings are required for all SafeRTOS based
     * applications.
     * If the whole build is using ARM mode then VECTORS length can be 0x20.
     * When using thumb mode, 0x80 is required to accommodate the interwork
     * code. */
	VECTORS (X)    : origin=0x00010020 length=0x00000080
    KERN_FUNC (RX) : origin=0x000100A0 length=0x0000FF80
    FLASH0  (RX)   : origin=0x00020020 length=0x001DFFE0
    FLASH1  (RX)   : origin=0x00200000 length=0x00200000
    STACKS  (RW)   : origin=0x08000000 length=0x00001800
    KERN_DATA (RW) : origin=0x08001800 length=0x00000800
    RAM     (RW)   : origin=0x08002000 length=0x0007e000

    /* The ECC memory is required to be setup to avoid ECC errors in the flash */
/*
    ECC_VEC (R)  : origin=0xf0400000 length=0x10 ECC={ input_range=VECTORS }
    ECC_KERN (R) : origin=0xf0400000 + 0x10 length=0xFF0 ECC={ input_range=KERN_FUNC }
    ECC_FLA0 (R) : origin=0xf0400000 + 0x1000 length=0x3F000 ECC={ input_range=FLASH0 }
    ECC_FLA1 (R) : origin=0xf0440000 length=0x40000 ECC={ input_range=FLASH1 }
*/
}

ECC
{
   algo_name : address_mask = 0xfffffff8
   hamming_mask = R4
   parity_mask = 0x0c
   mirroring = F021
}

/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
    /* These configuration settings are required for all SafeRTOS based
     * applications. */

    /* The following symbols need to be exported:
     *
     * lnkFlashStartAddr - the start of the Flash memory section used during runtime.
     *
     * IMPORTANT NOTE: lnkFlashStartAddr can be relocated (e.g. when a
     * bootloader is used), but it must be aligned according to its size
     * (rounded up to the next power of 2), otherwise the MPU will be
     * configured incorrectly.
     *
     * lnkFlashEndAddr - the end of the Flash memory section used during runtime.
     *
     * lnkKernelFuncStartAddr - the start address of the Flash block containing
     * the interrupt vector table and the kernel functions.
     * NOTE: This should be aligned according to the section size, i.e. 0x8000.
     *
     * lnkKernelFuncEndAddr - the end address of the Flash block containing
     * the interrupt vector table and the kernel functions.
     *
     * lnkKernelDataStartAddr - the start address of the RAM block containing
     * the system stacks and the kernel data.
     *
     * lnkKernelDataEndAddr - the end address of the RAM block containing
     * the system stacks and the kernel data.
     */

    /* On this demo application, the kernel functions section is placed at the
     * start of the Flash memory; this will not be the case if the application
     * is relocated. */

    .intvecs        : palign(32), START( lnkFlashStartAddr ), START( lnkKernelFuncStartAddr )
                        fill =0xffffffff {}                 > VECTORS

    KERNEL_FUNCTION : END( lnkKernelFuncEndAddr ) {}        > KERN_FUNC

    .unpriv_flash   : palign(32), fill =0xffffffff, END( lnkFlashEndAddr )
    {
        *(.text)
        *(.const)
    }                                                       > FLASH0 | FLASH1

    .cinit          : palign(32), fill =0xffffffff {}       > FLASH0 | FLASH1
    .pinit          : palign(32), fill =0xffffffff {}       > FLASH0 | FLASH1

    STACK_DATA      : START(lnkKernelDataStartAddr ) {}    > STACKS
    KERNEL_DATA     : END( lnkKernelDataEndAddr ) {}        > KERN_DATA
    .bss            : {}                                    > RAM
	/* Move all the libc.a library data section to predefined section*/
     __block_libc_data__
                    : START( lnkLibCStartAddr )
                        {

                        } > RAM palign( 0x1000 )
     /* End Data section alignment of libc.a library  */
    .data           : {}                                    > RAM
    .sysmem         : {}                                    > RAM

    /* These configuration settings are for the SafeRTOS RM48
     * demonstration project.
     * They are included as a demonstration of how task data can be grouped
     * together into known locations, therefore enabling MPU regions to be
     * defined.
     */

    __idle_hook_data__
                    : START( lnkIdleHookDataStartAddr )
                        {} > RAM palign( 0x20 )
    __block_tim_data__
                    : START( lnkBlockTimeTestDataStartAddr )
                        {} > RAM palign( 0x20 )
    __block_q_data__
                    : START( lnkBlockQueueTestDataStartAddr )
                        {} > RAM palign( 0x80 )
    __dynamic_task_data__
                    : START( lnkDynamicTestDataStartAddr )
                        {} > RAM palign( 0x40 )
    __led_task_data__
                    : START( lnkLEDFlashTestDataStartAddr )
                        {} > RAM palign( 0x20 )
    __poll_q_data__
                    : START( lnkPollQTestDataStartAddr )
                        {} > RAM palign( 0x20 )
    __binary_semaphore_task_data__
                    : START( lnkSemaphoreTestDataStartAddr )
                        {} > RAM palign( 0x40 )
    __create_delete_data__
                    : START( lnkCreateDeleteDemoDataStartAddr )
                        {} > RAM palign( 0x20 )
    __com_test_data__
                    : START( lnkComTestDataStartAddr )
                        {} > RAM palign( 0x20 )
    __maths_test_data__
                    : START( lnkMathsTestDataStartAddr )
                        {} > RAM palign( 0x20 )
    __counting_semaphore_task_data__
                    : START( lnkCountSemTestDataStartAddr )
                        {} > RAM palign( 0x40 )
    __notified_task_data__
                    : START( lnkTaskNotifyDataStartAddr )
                        {} > RAM palign( 0x20 )
    __timer_demo_task_data__
                    : START( lnkTimerTestDataStartAddr )
                        {} > RAM palign( 0x800 )
    __rec_mutex_data__
                    : START( lnkRecMutexDataStartAddr )
                        {} > RAM palign( 0x40 )
    __checkpoint_demo_data__
                    : START( lnkCheckpointDemoDataStart )
                        {} > RAM palign( 0x800 )
     __block_Bms_data__
                    : START( lnkBmsDataStartAddr )
                        {
                        	*rtsv7R4_A_le_v3D16_eabi.lib(.data)
                        	*HL_sci.obj(.data)
							*HL_sci.obj(.bss)
							*uartDrv.obj(.data)
							*gpio.obj(.data)
							*Battery_Isolation.obj(.bss)
							*BMS_Root.obj(.bss)
							*CB_DetDischargeCap.obj(.bss)
							*CB_DetDischargeCap_data.obj(.bss)
							*Cell_Balancing.obj(.bss)
							*Charge_Manager.obj(.bss)
							*EE_CalcSOC.obj(.bss)
							*EE_CalcSOH.obj(.bss)
							*EE_DetBatStatus.obj(.bss)
							*Energy_Estimation.obj(.bss)
							*Energy_Estimation_data.obj(.bss)
							*HV_BrkConfirmation.obj(.bss)
							*HV_BrkControlSequence.obj(.bss)
							*HV_Distribution.obj(.bss)
							*HV_Distribution_data.obj(.bss)
							*Input_Manager.obj(.bss)
							*Input_Manager_data.obj(.bss)
							*look1_binlc.obj(.bss)
							*look1_binlca.obj(.bss)
							*LV_Distribution.obj(.bss)
							*Mode_Manager.obj(.bss)
							*Output_Manager.obj(.bss)
							*RLib_DelayTimer.obj(.bss)
							*RLib_SimpleLatch.obj(.bss)
							*System_Protections.obj(.bss)
							*System_Protections_data.obj(.bss)
							*Battery_Isolation.obj(.data)
							*BMS_Root.obj(.data)
							*CB_DetDischargeCap.obj(.data)
							*CB_DetDischargeCap_data.obj(.data)
							*Cell_Balancing.obj(.data)
							*Charge_Manager.obj(.data)
							*EE_CalcSOC.obj(.data)
							*EE_CalcSOH.obj(.data)
							*EE_DetBatStatus.obj(.data)
							*Energy_Estimation.obj(.data)
							*Energy_Estimation_data.obj(.data)
							*HV_BrkConfirmation.obj(.data)
							*HV_BrkControlSequence.obj(.data)
							*HV_Distribution.obj(.data)
							*HV_Distribution_data.obj(.data)
							*Input_Manager.obj(.data)
							*Input_Manager_data.obj(.data)
							*look1_binlc.obj(.data)
							*look1_binlca.obj(.data)
							*LV_Distribution.obj(.data)
							*Mode_Manager.obj(.data)
							*Output_Manager.obj(.data)
							*RLib_DelayTimer.obj(.data)
							*RLib_SimpleLatch.obj(.data)
							*System_Protections.obj(.data)
							*System_Protections_data.obj(.data)
							*bmsAdc.obj(.data)
							*sciCommon.obj(.data)
							*Rs485Drv.obj(.data)
							*HL_i2c.obj(.data)
							*HL_i2c.obj(.bss)
							*CmdClient.obj(.data)
							*CmdClient.obj(.bss)
							*CommandMaps.obj(.data)
							*CommandMaps.obj(.bss)
							*ProcessGenericCmd.obj(.data)
							*ProcessGenericCmd.obj(.bss)
							*ProcessAdbmsTempCmd.obj(.data)
							*ProcessAdbmsTempCmd.obj(.bss)
							*ProcessAdbmsVoltCmd.obj(.data)
							*ProcessAdbmsVoltCmd.obj(.bss)
							*ProcessAdbmsCellBal.obj(.data)

                        } > RAM palign( 0x10000 )

}

Hi Kamyar,

I don't see any major issues with your linker cmd files. However, i don't understand why you are not starting the bootloader code at starting location of flash.

Why instead of starting from 0x00000020 you are starting it from 0x00004000, what is the purpose of doing this?

I am also suggesting you refer below thread once:

Here you can find several working bootloader example codes, so you can just check them once

(+) [FAQ] TMS570LC4357: Examples and Demos available for Hercules Controllers (E.g. TMS570x, RM57x and RM46x etc) - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

--
Thanks & regards,
Jagadish.

Hi Jagadish

Thanks for reviewing.

To start the bootloader code from 0x4000 instead of 0x20, we need to copy our application's exception vector table into the bootloader's. This requires erasing the first sector each time after flashing new firmware. The RM57L843 does not allow relocating the exception vector table address like the VTOR does in ARM Cortex M series. Is there a way to achieve this? Also, will starting from 0x4000 cause any issues?

Kamyar,

Kamyar Mirzazadeh Moghadam said:

 The RM57L843 does not allow relocating the exception vector table address like the VTOR does in ARM Cortex M series. Is there a way to achieve this?

You are correct, vector relocation is not possible.

Kamyar Mirzazadeh Moghadam said:

Also, will starting from 0x4000 cause any issues?

No, it won't cause any issues. Even i created one sample demo and tested it worked without any issues.

Application_at_0x4000_TEST_RM57.zip

So, the issue should be something else. I need your complete bootloader and application projects for verification, is it possible to share them? or at least a simplest project with the issue. You can even send through private messages.

---
Thanks & regards,
Jagadish.

Jagadish,

The application and bootloader each work independently without issues. However, when jumping from the bootloader to the application, a data abort error occurs. It appears that some initializations being done twice—once in the bootloader and again in the application—are causing this problem. Do you have any insights on why this double initialization is causing issues?

Hi Kamyar,

(+) [FAQ] TMS570LC4357: Troubleshooting the Abort Exceptions on Hercules Devices - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

In above FAQ my colleague discussed how to troubleshoot the exception, can you please refer above thread, and can you please try to find out exactly which address causing the exception. And verify the corresponding address in map file and you can find out exactly which function causing the issue.

--

Thanks & regards,
Jagadish.

Thanks for the link and it is very helpful. but we already know which line of the code in the application make the issue but we don't know why it is happening.

that line of the code when we run then application standalone and not through the bootloader it works without any issue.

As we check these problem are happening when the chip get initiated two times: first in the bootloader and then in the application .

My question is why it make the problem ?

Hi Kamyar,

Can you please share the screenshot of exactly at which line and which function the issue is occurring?

And also, i need the HALCoGen MPU configurations for both bootloader and application?

--
Thanks & regards,
Jagadish.