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Original question:

MCU-PLUS-SDK-AM243X: debug SBL signing failure for LP-AM263

MCU-PLUS-SDK-AM243X: sbl_qspi example fails to build

Nathan Ostrye
Prodigy 200 points
Part Number: MCU-PLUS-SDK-AM243X
Other Parts Discussed in Thread: TMDSCNCD263P, SYSCONFIG, UNIFLASH, TMDSCNCD263

Tool/software:

I am working with the TMDSCNCD263P, TI AM263Pzx controlCARD Evaluation module, and attempting to load from flash at startup. Unfortunately, I am unable to get the sbl_qspi example to build. here's the build log: 

**** Build of configuration Release for project sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang ****

"C:\\ti\\ccs1280\\ccs\\utils\\bin\\gmake" -k -j 20 all -O

Building file: "../example.syscfg"
Invoking: SysConfig
"C:/ti/sysconfig_1.20.0/sysconfig_cli.bat" --script "C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/example.syscfg" -o "syscfg" -s "C:/ti/mcu_plus_sdk_am263x_09_02_00_55/.metadata/product.json" --context "r5fss0-0" --part AM263x --package ZCZ --compiler ticlang
Running script...
Validating...
info: /kernel/dpl/debug_log uartLog.baudRate: Actual Baudrate Possible: 115385 (0 % error)
Generating Code (example.syscfg)...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_dpl_config.c...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_dpl_config.h...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_drivers_config.c...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_drivers_config.h...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_drivers_open_close.c...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_drivers_open_close.h...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_pinmux_config.c...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_power_clock_config.c...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_board_config.c...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_board_config.h...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_board_open_close.c...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_board_open_close.h...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_enet_config.c...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_enet_config.h...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_enet_open_close.c...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_enet_open_close.h...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_enet_soc.c...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_enet_lwipif.c...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\ti_enet_lwipif.h...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\linker.cmd...
Writing C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang\Release\syscfg\linker_defines.h...
Finished building: "../example.syscfg"

Building file: "syscfg/ti_enet_config.c"
Invoking: Arm Compiler
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -I"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/include/c" -I"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source" -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -MMD -MP -MF"syscfg/ti_enet_config.d_raw" -MT"syscfg/ti_enet_config.o" -I"C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/syscfg" -o"syscfg/ti_enet_config.o" "syscfg/ti_enet_config.c"
Finished building: "syscfg/ti_enet_config.c"

Building file: "syscfg/ti_enet_open_close.c"
Invoking: Arm Compiler
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -I"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/include/c" -I"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source" -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -MMD -MP -MF"syscfg/ti_enet_open_close.d_raw" -MT"syscfg/ti_enet_open_close.o" -I"C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/syscfg" -o"syscfg/ti_enet_open_close.o" "syscfg/ti_enet_open_close.c"
Finished building: "syscfg/ti_enet_open_close.c"

Building file: "syscfg/ti_power_clock_config.c"
Invoking: Arm Compiler
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -I"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/include/c" -I"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source" -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -MMD -MP -MF"syscfg/ti_power_clock_config.d_raw" -MT"syscfg/ti_power_clock_config.o" -I"C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/syscfg" -o"syscfg/ti_power_clock_config.o" "syscfg/ti_power_clock_config.c"
Finished building: "syscfg/ti_power_clock_config.c"

Building file: "syscfg/ti_enet_soc.c"
Invoking: Arm Compiler
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -I"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/include/c" -I"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source" -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -MMD -MP -MF"syscfg/ti_enet_soc.d_raw" -MT"syscfg/ti_enet_soc.o" -I"C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/syscfg" -o"syscfg/ti_enet_soc.o" "syscfg/ti_enet_soc.c"
Finished building: "syscfg/ti_enet_soc.c"

Building file: "syscfg/ti_enet_lwipif.c"
Invoking: Arm Compiler
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -I"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/include/c" -I"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source" -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -MMD -MP -MF"syscfg/ti_enet_lwipif.d_raw" -MT"syscfg/ti_enet_lwipif.o" -I"C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/syscfg" -o"syscfg/ti_enet_lwipif.o" "syscfg/ti_enet_lwipif.c"
Finished building: "syscfg/ti_enet_lwipif.c"

Building file: "syscfg/ti_dpl_config.c"
Invoking: Arm Compiler
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -I"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/include/c" -I"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source" -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -MMD -MP -MF"syscfg/ti_dpl_config.d_raw" -MT"syscfg/ti_dpl_config.o" -I"C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/syscfg" -o"syscfg/ti_dpl_config.o" "syscfg/ti_dpl_config.c"
Finished building: "syscfg/ti_dpl_config.c"

Building file: "syscfg/ti_drivers_open_close.c"
Invoking: Arm Compiler
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -I"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/include/c" -I"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source" -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -MMD -MP -MF"syscfg/ti_drivers_open_close.d_raw" -MT"syscfg/ti_drivers_open_close.o" -I"C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/syscfg" -o"syscfg/ti_drivers_open_close.o" "syscfg/ti_drivers_open_close.c"
Finished building: "syscfg/ti_drivers_open_close.c"

Building file: "syscfg/ti_pinmux_config.c"
Invoking: Arm Compiler
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -I"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/include/c" -I"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source" -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -MMD -MP -MF"syscfg/ti_pinmux_config.d_raw" -MT"syscfg/ti_pinmux_config.o" -I"C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/syscfg" -o"syscfg/ti_pinmux_config.o" "syscfg/ti_pinmux_config.c"
Finished building: "syscfg/ti_pinmux_config.c"

Building file: "syscfg/ti_drivers_config.c"
Invoking: Arm Compiler
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -I"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/include/c" -I"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source" -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -MMD -MP -MF"syscfg/ti_drivers_config.d_raw" -MT"syscfg/ti_drivers_config.o" -I"C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/syscfg" -o"syscfg/ti_drivers_config.o" "syscfg/ti_drivers_config.c"
Finished building: "syscfg/ti_drivers_config.c"

Building file: "syscfg/ti_board_config.c"
Invoking: Arm Compiler
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -I"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/include/c" -I"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source" -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -MMD -MP -MF"syscfg/ti_board_config.d_raw" -MT"syscfg/ti_board_config.o" -I"C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/syscfg" -o"syscfg/ti_board_config.o" "syscfg/ti_board_config.c"
Finished building: "syscfg/ti_board_config.c"

Building file: "syscfg/ti_board_open_close.c"
Invoking: Arm Compiler
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -I"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/include/c" -I"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source" -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -MMD -MP -MF"syscfg/ti_board_open_close.d_raw" -MT"syscfg/ti_board_open_close.o" -I"C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/syscfg" -o"syscfg/ti_board_open_close.o" "syscfg/ti_board_open_close.c"
Finished building: "syscfg/ti_board_open_close.c"

Building file: "../main.c"
Invoking: Arm Compiler
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -I"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/include/c" -I"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source" -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -MMD -MP -MF"main.d_raw" -MT"main.o" -I"C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/syscfg" -o"main.o" "../main.c"
Finished building: "../main.c"

Building target: "sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang.out"
Invoking: Arm Linker
"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmclang.exe" -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -Os -DSOC_AM263X -DR5F0_INPUTS -g -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -Wl,-m"sbl_qspi.Release.map" -Wl,-i"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source/kernel/nortos/lib" -Wl,-i"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source/drivers/lib" -Wl,-i"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source/board/lib" -Wl,-i"C:/ti/mcu_plus_sdk_am263x_09_02_00_55/source/sdl/lib" -Wl,-i"C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/lib" -Wl,--reread_libs -Wl,--diag_suppress=10063 -Wl,--diag_wrap=off -Wl,--display_error_number -Wl,--warn_sections -Wl,--xml_link_info="sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang_linkInfo.xml" -Wl,--ram_model -o "sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang.out" "./syscfg/ti_dpl_config.o" "./syscfg/ti_drivers_config.o" "./syscfg/ti_drivers_open_close.o" "./syscfg/ti_pinmux_config.o" "./syscfg/ti_power_clock_config.o" "./syscfg/ti_board_config.o" "./syscfg/ti_board_open_close.o" "./syscfg/ti_enet_config.o" "./syscfg/ti_enet_open_close.o" "./syscfg/ti_enet_soc.o" "./syscfg/ti_enet_lwipif.o" "./main.o" -Wl,-l"syscfg/linker.cmd" -Wl,-lnortos.am263x.r5f.ti-arm-clang.release.lib -Wl,-ldrivers.am263x.r5f.ti-arm-clang.release.lib -Wl,-lboard.am263x.r5f.ti-arm-clang.release.lib -Wl,-lsdl.am263x.r5f.ti-arm-clang.release.lib -Wl,-llibc.a -Wl,-llibsysbm.a
Finished building target: "sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang.out"

C:/ti/ccs1280/ccs/utils/bin/gmake -C C:\CCS12_8_0_workspace\sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang -f makefile_ccs_bootimage_gen OUTNAME=sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang PROFILE=Release MCU_PLUS_SDK_PATH=C:/ti/mcu_plus_sdk_am263x_09_02_00_55 CG_TOOL_ROOT=C:/ti/ti_cgt_tiarmclang_3.2.2.LTS CCS_INSTALL_DIR=C:\ti\ccs1280\ccs CCS_IDE_MODE=desktop DEVICE=am263x
Boot image: am263x:r5fss0-0:nortos:ti-arm-clang C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang.tiimage ...
C:/ti/ti_cgt_tiarmclang_3.2.2.LTS/bin/tiarmobjcopy --strip-all -O binary Release/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang.out C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang.bin
python C:/ti/mcu_plus_sdk_am263x_09_02_00_55/tools/boot/signing/mcu_rom_image_gen.py --image-bin C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang.bin --core R5 --swrv 1 --loadaddr 0x70002000 --sign-key C:/ti/mcu_plus_sdk_am263x_09_02_00_55/tools/boot/signing/mcu_gpkey.pem --out-image C:/CCS12_8_0_workspace/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang/Release/sbl_qspi_am263x-lp_r5fss0-0_nortos_ti-arm-clang.tiimage --debug DBG_SOC_DEFAULT
makefile_ccs_bootimage_gen:65: recipe for target 'all' failed
'openssl' is not recognized as an internal or external command,
operable program or batch file.
Traceback (most recent call last):
File "C:\ti\mcu_plus_sdk_am263x_09_02_00_55\tools\boot\signing\mcu_rom_image_gen.py", line 384, in <module>
cert_str = get_cert(args)
^^^^^^^^^^^^^^
File "C:\ti\mcu_plus_sdk_am263x_09_02_00_55\tools\boot\signing\mcu_rom_image_gen.py", line 252, in get_cert
openssl_version: str = str(subprocess.check_output(f"openssl version", shell=True))
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "C:\Program Files\WindowsApps\PythonSoftwareFoundation.Python.3.11_3.11.2544.0_x64__qbz5n2kfra8p0\Lib\subprocess.py", line 466, in check_output
return run(*popenargs, stdout=PIPE, timeout=timeout, check=True,
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "C:\Program Files\WindowsApps\PythonSoftwareFoundation.Python.3.11_3.11.2544.0_x64__qbz5n2kfra8p0\Lib\subprocess.py", line 571, in run
raise CalledProcessError(retcode, process.args,
subprocess.CalledProcessError: Command 'openssl version' returned non-zero exit status 1.
gmake[3]: *** [all] Error 1
makefile:167: recipe for target 'post-build' failed
gmake[2]: [post-build] Error 2 (ignored)

**** Build Finished ****

  • 0
    TI__Genius 16272 points

    Hi Nathan,

    Nathan Ostrye said:
    subprocess.CalledProcessError: Command 'openssl version' returned non-zero exit status 1.

    The error indicates OpenSSL not being installed. I recommend having 3.x.installed to build the example. Please refer to : software-dl.ti.com/.../SDK_DOWNLOAD_PAGE.html

    Regards,
    Shaunak

  • 0 in reply to Shaunak Deshpande
    Prodigy 200 points

    That appears to have fixed the build issue. I am now building successfully.

    However, I am unable to use UniFlash to place the files onto the TMDSCNCD263. I select the sbl_qspi.release.tiimage from the mcu_plus_sdk_am263x_09_02_00_55, and the .appimage file from the release folder of my project. When I click the Load Images button, I get the message "Error! File: Multiple Files: Load failed." here is the output on the console:

    [8/23/2024, 12:05:59 PM] [INFO] Cortex_R5_0: GEL Output: Loading Gel Files on R5F0
    [8/23/2024, 12:06:00 PM] [INFO] Cortex_R5_0: GEL Output: Gel files loading on R5F0 Complete
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: ***OnTargetConnect() Launched***
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: AM263x Initialization Scripts Launched. Please Wait...
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: AM263x_Cryst_Clock_Loss_Status() Launched
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Crystal Clock present
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: AM263x_SOP_Mode() Launched
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: SOP MODE = 0x0000000B
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Dev boot mode
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: AM263x_Read_Device_Type() Launched
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: EFuse Device Type Value = 0x000000AA
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: AM263x_Check_supported_mode() Launched
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: The Device supports both LockStep & Dual Core mode
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: mode = 1
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: MSS_CTRL Control Registers Unlocked
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: MSS_TOP_RCM Control Registers Unlocked
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: MSS_RCM Control Registers Unlocked
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: MSS_IOMUX Control Registers Unlocked
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: TOP_CTRL Control Registers Unlocked
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: *** R5FSS0 Reset DualCore ***
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: ***R5FSS1 Reset DualCore ***
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: R5F ROM Eclipse
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: R5FSS0_0 Released
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: R5FSS0_1 Released
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: R5FSS1_0 Released
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: R5FSS1_1 Released
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: All R5F Cores Released for program load
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: L2 Mem Init Complete
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: MailBox Mem Init Complete
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: *********** R5FSS0/1 Dual Core mode Configured********
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: SYS_CLK DIVBY2
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: DPLL_CORE_HSDIV0_CLKOUT0 selected as CLK source for R5FSS & SYS CLKs
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: CLK Programmed R5F=400MHz and SYS_CLK=200MHz
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: *** Enabling Peripheral Clocks ***
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling RTI[0:3] Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling RTI_WDT[0:3] Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling UART[0:5]/LIN[0:5] Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling QSPI Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling I2C Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling TRACE Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling MCAN[0:3] Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling GPMC Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling ELM Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling MMCSD Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling MCSPI[0:4] Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling CONTROLSS Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling CPTS Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling RGMI[5,50,250] Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling XTAL_TEMPSENSE_32K Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: Enabling XTAL_MMC_32K Clocks
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: ***All IP Clocks are Enabled***
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: AM263x
    [8/23/2024, 12:06:20 PM] [INFO] Cortex_R5_0: GEL Output: CPU reset (soft reset) has been issued through GEL.
    [8/23/2024, 12:06:41 PM] [ERROR] Cortex_R5_0: Run failed...
    [8/23/2024, 12:06:41 PM] [ERROR] Cortex_R5_0: File Loader: Memory write failed: Timed out waiting for target to halt while executing am263x_flasher.out
  • 0 in reply to Nathan Ostrye
    TI__Genius 16272 points

    Hi Nathan,

    Can you share all the files you are trying to load using the UniFlash tool in dev boot mode on the AM263x.

    I will try to reproduce this issue on my end.

    Regards,

    Shaunak

  • 0 in reply to Shaunak Deshpande
    Prodigy 200 points

    Files links inclucded:

    Application Image

    SBL Image

    The sbl_ospi.release.tiimage was sourced from mcu_plus_sdk_am263px_09_02_00_56. 

  • 0 in reply to Nathan Ostrye
    TI__Genius 16272 points

    Hi Nathan,

    There are a lot of things happening incorrect here.

    1. AM263x and AM263Px are different hardware. AM263x has QSPI flash, AM263Px has OSPI flash. We cannot flash the OSPI images to the QSPI flash on the AM263x device.

    2. If you want to flash an application on your AM263x-LP, it must come from the AM263x SDK itself and not the AM263Px SDK. You are basically trying to flash an image meant for AM263Px on AM263x.

    3. For example, if you want to flash a hello world example, you must build the hello world example from the AM263x SDK for the LP device. Then use the sbl_qspi.release.tiimage and the hello_world.appimage and load it in your UniFlash tool.

    Regards,
    Shaunak 

  • 0 in reply to Shaunak Deshpande
    Prodigy 200 points

    Yes, I discovered yesterday that I was mixing the AM263x and AM263Px example projects. Please note that this occurred due to the lack of AM263Px Control Card examples present in the Resource Explorer, but projects exists for the AM263 Control Card.

    I am working with the AM263Px-CC. Even after correcting the projects to use the correct AM263Px, I am encountering the same issue.

  • 0 in reply to Nathan Ostrye
    Prodigy 200 points

    I was able to get the TMDSCNCD263P to boot from OSPI flash.  In order to program the flash with UniFlash, DO NOT use the TMDSCNCD263 controlCARD configuration.  Instead, select "AM263PX" as the device and "Texas Instruments SDS110 USB Debug Probe" for the connection.  The "sbl_ospi.release.tiimage" file can then be used from mcu_plus_sdk_am263px_09_02_00_56\tools\boot\sbl_prebuilt\am263px-cc

  • 0 in reply to Nathan Ostrye
    TI__Genius 16272 points

    Hi Nathan,

    Glad to know we have it working now.

    I do see the examples in resource explorer for AM263Px (https://dev.ti.com/tirex/explore/node?node=A__AEIJm0rwIeU.2P1OBWwlaA__MCU-PLUS-SDK-AM263PX__HVz3lnH__LATEST)

    Nathan Ostrye said:
    DO NOT use the TMDSCNCD263 controlCARD configuration.  Instead, select "AM263PX" as the device and "Texas Instruments SDS110 USB Debug Probe" for the connection

    Yup, you are correct. TMDSCNCD263 is basically the AM263x device. The TMDSCNCD263P is the AM263Px. And as we discussed above, they are two different devices.

    Regards,
    Shaunak