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Tool/software:
The TRM refers to spruim2g.pdf.
In the TRM, section "6.2.3.11 R5FSS Boot Options," it says, "The user can place the exception vectors at the address indicated by the exception vector bootstrap and then program the boot vector there."
I don't know what specific operations I should perform on the software side to achieve the behavior described in the text, so I would like to know.
Also, would you be able to provide a sample?
Thank you in advance for your help.
Hello,
The SDK already implements the necessary steps for running applications on the different cores.
Please refer the SDK Getting Started guide:
Regards,
Prashant
Thank you for your reply.
"The user can place the exception vectors at the address indicated by the exception vector bootstrap and then program the boot vector there."
Could you please tell me the path to the sample in the SDK where the above behavior can be confirmed, or the corresponding source code?
Thank you in advance for your help.