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Original question:

MCU-PLUS-SDK-AM243X: using DP83849 for EtherCAT on AM243x

MCU-PLUS-SDK-AM243X: Which DP83826 signals are needed for EtherCAT

Steve Squires
Intellectual 545 points
Part Number: MCU-PLUS-SDK-AM243X
Other Parts Discussed in Thread: AM2434, SYSCONFIG

Tool/software:

Hello, we are using a pair of DP83826 PHYs connected to an AM2434 for use in an EtherCAT subdevice (working OK).

We have connected the DP83826's LINK signals to PRG1_PRU0_GPO8 and PRG1_PRU1_GPO8 as per the documentation. I can see that SysConfig is correctly mapping them and I presume that the firmware is using them.

However, we have also been previously instructed by TI to connect the ACT and CRS signals into the GPO9 and GPO10 signals on PRU0 and PRU1 respectively.

They are not mentioned in the "PRU-ICSS EtherCAT Slave Firmware Data Sheet" nor in "How and Why to Use the DP83826 for EtherCAT® Applications" (for PRUs) and we particularly note that these signals are NOT mapped in SysConfig. 

Given that we are short of IO, we are wondering if these connections are necessary.

Please kindly confirm whether or not ACT and CRS signals are necessary for AM243x EtherCAT subdevices (pointing to relevant documentation is always helpful).

Thanks, Steve

  • 0
    TI__Expert 8955 points

    Hi Steve,

    Steve Squires said:
    However, we have also been previously instructed by TI to connect the ACT and CRS signals into the GPO9 and GPO10 signals on PRU0 and PRU1 respectively.
    • Was this recommended for EtherCAT configuration?

    Regards,
    Aaron 

  • 0 in reply to Aaron Thomas
    Intellectual 545 points

    Hi Aaron - I don't know the details of where the recommendation came from as it was a colleague of mine working on the schematic.

    To confirm: It is an EtherCAT SubDevice, using Beckhoff SCC, on AM2434 with DP83826 PHYs that we are implementing. 

    In addition to getting more IO, I want the PDI interrupt to come out on a physical pin. This, according to the documentation, can only be one of PRG1_PRU0_GPO9, PRG1_PRU0_GPO10, PRG1_PRU1_GPO9 or PRG1_PRU1_GPO10 - precisely the pins connected to ACT and CRS from the PHYs. This does make me feel like these connections are redundant.

    Any guidance as to whether we can eliminate the ACT and CRS connections (or what they might be needed for) is appreciated.

    Thanks, Steve

  • 0 in reply to Steve Squires
    TI__Expert 8955 points

    Hi Steve,

    I'm not really sure if ACT and CRS connections are required for EtherCAT DubDevice. I'll look into this and get back to you by early next week.

    Regards,
    Aaron

  • 0 in reply to Aaron Thomas
    Intellectual 545 points

    Hi Aaron - next week would be good as we are finalizing our PCB layout.

    Thanks, Steve

  • 0 in reply to Steve Squires
    TI__Mastermind 47551 points
    Steve Squires said:
    We have connected the DP83826's LINK signals to PRG1_PRU0_GPO8 and PRG1_PRU1_GPO8 as per the documentation. I can see that SysConfig is correctly mapping them and I presume that the firmware is using them.

    Yes, correct. pr1_mii0/1_rxlink is used for fast link detection and critical for cable redundancy support.

    Steve Squires said:
    However, we have also been previously instructed by TI to connect the ACT and CRS signals into the GPO9 and GPO10 signals on PRU0 and PRU1 respectively.

    This is optional for industrial ethernet protocols requiring half duplex support. So you can ignore this if not a use case for product.

    Steve Squires said:
    In addition to getting more IO, I want the PDI interrupt to come out on a physical pin. This, according to the documentation, can only be one of PRG1_PRU0_GPO9, PRG1_PRU0_GPO10, PRG1_PRU1_GPO9 or PRG1_PRU1_GPO10

    Can you point to the documentation you referred?  Actually, this is only possible via PRG1_IEP0_EDIO_DATA_IN_OUT[31:28] pins.

  • 0 in reply to PratheeshGangadhar
    Intellectual 545 points

    Hi Pratheesh,

    Regarding which documentation: I am looking at the comment for PDI ISR DIGIO pin selection register 0x0E0A in: /ti/ind_comms_sdk_am243x_09_02_00_15/docs/api_guide_am243x/ETHERCAT_SUBDEVICE_CONTROLLER_REGISTER_LIST.html. which says:

    PDI ISR DIGIO pin selection register, selects one of pr1_edio_data_out(24+N), N=0-7 pins as PDI ISR hw pin, configure 255 to disable. Set corresponding bitmask to enable. Application needs to configure pinmux correctly for this to work.

    I think we are both referring to the same pins - I tend to use the Mux0 names (the names on the schematic symbols), i.e., PRG1_PRU0_GPO9, PRG1_PRU0_GPO10, PRG1_PRU1_GPO9 or PRG1_PRU1_GPO10 which are equivalent to Mux6 names PRG1_IEP0_EDIO_DATA_IN_OUT28, PRG1_IEP0_EDIO_DATA_IN_OUT29, PRG1_IEP0_EDIO_DATA_IN_OUT30 and PRG1_IEP0_EDIO_DATA_IN_OUT31.

    To be honest, the interrupt pin documentation is pretty-well buried - I only found it by searching the SDK folder for 0x0E0A. And I only found that by reading the older "PRU-ICSS EtherCAT Slave Firmware Data Sheet".

    Please add a section to the SDK for configuring a physical EtherCAT PDI interrupt pin.

    Thanks, Steve

  • 0 in reply to Steve Squires
    TI__Expert 8955 points

    Hi Steve,

    Steve Squires said:
    Please add a section to the SDK for configuring a physical EtherCAT PDI interrupt pin.
    • Thanks for the input. We will raise a ticket internally and fix this in the next release.

    Regards,
    Aaron