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Tool/software:
Hi TI Experts,
We are discussing offline about the support of ethernet primary boot & backup boot. As following your suggestion, I also created E2E thread here to involve customer together so that we could stay on the same page.
In the last email thread, customer followed the below steps to see if the ethernet backup boot is working properly on their board.
Customer got the Wireshark screenshot below.
Customer is pretty sure the MAC address 88:0C:E0:67:D6:18 is for the AM2431 on their board, since the Ethernet port of the board is directly connected to their computer’s Ethernet port with a cable, and their computer’s MAC is totally different.
By the way, customer notices that for the backup boot, AM2431 only sends BOOTP request about 117s after power up. It is a little bit too long.
If Ethernet Boot program/tools is ready, customer will change the Ethernet as Primary boot (with mode change switch) in next board spin.
So please make sure the Ethernet boot tool we are working on can work for both Primary boot as well as backup boot.
Thanks,
Kevin
Hi Jianyu,
I have rebuilt the SDK, now the phy can correctly bind to 83826.
This is good, can you build the example in release mode and test again.
Please make sure you have added the static ARP entry in your PC as mentioned in the guide.
Also, you should monitor the port through wireshark and see if any packets are received from the board. This will help pin-point what exactly is not working.
Regards,
Nitika
Hi Nitika,
The log is different if built in release,
DMSC Firmware Version 10.0.8--v10.00.08 (Fiery Fox)
DMSC Firmware revision 0xa
DMSC ABI revision 4.0
[ ENETSBL ] Starting Ethernet Transfer ...
Enabling clocks!
EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:1 From 4 To 2
Open MAC port 2
EnetPhy_bindDriver:1873
PHY 7 is alive
EnetMod_ioctl:1608
Cpsw_registerIoctlHandler:1844
EnetPer_ioctl:1394
Enet_ioctl:1057
Failed to set dscp Priority map for Port 1 - -1
[ ENETSBL ] initQs() txFreePktInfoQ initialized with 8 pkts
[ ENETSBL ] EVM MAC address: 88:0c:e0:67:d6:2d
[ ENETSBL ] PHY 7 is alive
[ ENETSBL ] Please wait for Linkup ...
[2024-12-12 02:01:34.926]
RX:Cpsw_handleLinkUp:1450
[2024-12-12 02:01:36.927]
RX:[ ENETSBL ] Linkup Done!
[2024-12-12 02:01:52.995]
RX:[ ENETSBL ] Status:0
[ ENETSBL ERROR ] Uniflash timeout error.
Cpsw_handleLinkDown:1476
Disabling clocks for ENET: 5, inst:0!
Flashing failed!!
Skipped boot-up!
The package is as follows,
Note that "Uniflash timeout error. " is triggered whether I executed uniflash.py or not. The network package is the one that I executed the py file.
Jianyu
Hi Jianyu,
The log is different if built in release,
This is expected, in release mode the ENET logs are optimised which is why you are seeing numbers in place of the actual message that was present in Debug mode.
"Uniflash timeout error" occurs when the appimage is not received.
The SBL is working as expected, can you let me know what IP addresses have you set? So I can understand the wireshark logs better.
Regards,
Nitika
Hi Nitika,
Thanks for your reply.
Customer sets the IP according to your example.
The local IP is 192.168.0.136, MAC 00-1b-21-8a-20-11
The DHCP IP given to the board is 192.168.0.137
The MAC address before running the SBL is 88-0c-e0-67-d6-08
The MAC address after running the SBL is 88-0c-e0-67-d6-2d
Thanks,
Kevin
Hi,
Have the System integration settings been modified? I expect the EVM mac address to be either of the 2 below:
From the wireshark logs, the board is sending the linkup complete packet to the PC (board IP address after SBL runs is 192.168.0.195) but the response is not reaching the board.
Few things to verify:
1. The macro ENET_HOST_PC_MAC_ADDRESS in the file sbl_enet.h should have the MAC address of the ethernet interface of Host PC.
2. The Gateway is set to 192.168.0.195 on the ethernet interface of the Host PC.
3. New-NetNeighbor command to add the static ARP entry should have the MAC address of the EVM (the address printed in the UART terminal after SBL runs)
Can you try to run the python script once you see "[ ENETSBL ] Please wait for Linkup ..." message on the terminal, you should get the "Received." message since the linkup packet has been sent out from the board.
Regards,
Nitika
Hi Nitika,
I have updated the variable.
1. The macro ENET_HOST_PC_MAC_ADDRESS in the file sbl_enet.h should have the MAC address of the ethernet interface of Host PC.
It seems that I am able to connect to the SBL program. However, the time window is a little bit too small between after the wait for linkup.
[ ENETSBL ] PHY 7 is alive
[ ENETSBL ] Please wait for Linkup ...
[2024-12-12 02:01:34.926]
RX:Cpsw_handleLinkUp:1450
[2024-12-12 02:01:36.927]
RX:[ ENETSBL ] Linkup Done!
So I managed once to run the script as soon as I saw Linkup Done. The console return the follows,
D:\CD3E-AP\Ethernet\Ethernet_boot>python enet_uniflash.py --cfg=default_sbl_enet_app.cfg [LOG] Parsing config file ... [LOG] Ensure that sbl_qspi_enet has already been sent over before running this script. [LOG] Found 1 command(s) !!! [LOG] Creating socket Starting Linkup ... Received. ('192.168.0.195', 5001) [LINKUP] (SUCCESS) EVM Linked up. Starting transfer ... Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 15%|▏| 8872/61139 [00:00<00:00, 593566.Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 17%|▏| 10344/61139 [00:00<00:00, 431962Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 19%|▏| 11816/61139 [00:00<00:00, 455279Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 22%|▏| 13288/61139 [00:00<00:00, 492875Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 24%|▏| 14760/61139 [00:00<00:00, 527486Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 27%|▎| 16232/61139 [00:00<00:00, 560188Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 29%|▎| 17704/61139 [00:00<00:00, 590607Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 31%|▎| 19176/61139 [00:00<00:00, 618939Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 34%|▎| 20648/61139 [00:00<00:00, 645489Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 36%|▎| 22120/61139 [00:00<00:00, 670540Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 39%|▍| 23592/61139 [00:00<00:00, 694098Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 41%|▍| 25064/61139 [00:00<00:00, 696664Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 43%|▍| 26536/61139 [00:00<00:00, 718222Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 46%|▍| 28008/61139 [00:00<00:00, 738073Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 48%|▍| 29480/61139 [00:00<00:00, 756183Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 51%|▌| 30952/61139 [00:00<00:00, 774234Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 53%|▌| 32424/61139 [00:00<00:00, 791964Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 55%|▌| 33896/61139 [00:00<00:00, 827918Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 58%|▌| 35368/61139 [00:00<00:00, 842869Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 60%|▌| 36840/61139 [00:00<00:00, 857809Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 63%|▋| 38312/61139 [00:00<00:00, 799125Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 65%|▋| 39784/61139 [00:00<00:00, 812463Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 67%|▋| 41256/61139 [00:00<00:00, 842524Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 70%|▋| 42728/61139 [00:00<00:00, 855152Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 72%|▋| 44200/61139 [00:00<00:00, 867317Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 75%|▋| 45672/61139 [00:00<00:00, 879100Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 77%|▊| 47144/61139 [00:00<00:00, 890419Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 80%|▊| 48616/61139 [00:00<00:00, 918221Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 82%|▊| 50088/61139 [00:00<00:00, 928094Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 84%|▊| 51560/61139 [00:00<00:00, 938051Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 87%|▊| 53032/61139 [00:00<00:00, 947904Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 89%|▉| 54504/61139 [00:00<00:00, 974214Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 92%|▉| 55976/61139 [00:00<00:00, 965991Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 94%|▉| 57448/61139 [00:00<00:00, 974080Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 96%|▉| 58920/61139 [00:00<00:00, 951137Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 99%|▉| 60392/61139 [00:00<00:00, 959119Sending ./hello_world_am243x-lp_r5fss0-0_freertos_ti-arm-clang.appimage.hs_fs: 61146packets [00:00, 971093.84packets/s]Traceback (most recent call last): File "D:\CD3E-AP\Ethernet\Ethernet_boot\enet_uniflash.py", line 461, in <module> status, part_time = transceive(sock, partial_file, len(partial_file), args.boardIP, args.boardPort,filecfg.cfgs[index].filename, total_size) File "D:\CD3E-AP\Ethernet\Ethernet_boot\enet_uniflash.py", line 410, in transceive data, addr = sock.recvfrom(8) socket.timeout: timed out
The UART still returns
2024-12-12 02:01:52.995]
RX:[ ENETSBL ] Status:0
[ ENETSBL ERROR ] Uniflash timeout error.
Cpsw_handleLinkDown:1476
Disabling clocks for ENET: 5, inst:0!
Flashing failed!!
Skipped boot-up!
And I think PC might still be transfering the data after the board time out.
Hi Jianyu,
However, the time window is a little bit too small between after the wait for linkup.
You can start the python script before also as long as it doesn't timeout before the board linkup happens. We can increase the timeout by increasing the value from 5 in the below line of the python script -
Hello_world has a relatively small appImage, I do not expect this timeout. Still we can try again by increasing the socket timeout.
Can you increase the value from 5 to 10 in this line of the enet_uniflash.py file - sock.settimeout(5)
Regards,
Nitika
Hi Nitika,
This time I started the script before SBL starts. The output is same. The firmware I used is Hello_world demo, the size of wich is 60KB.
I am pretty sure the board prints time out before the transfer finish.
Hi Jianyu,
The Uniflash timeout print is also seen if there is an error while processing the flash commands, specifically if an error is returned from the Bootloader_uniflashProcessFlashCommands() function indicating that it could be a Flash issue.
/* Process the flash commands and return a response */ status = Bootloader_uniflashProcessFlashCommands(&uniflashConfig, &respHeader); /* Exit if error or timeout; Send response to host */ if (status != SystemP_SUCCESS) { DebugP_log("[ ENETSBL ERROR ] Uniflash timeout error.\r\n"); done = 1U; status = SystemP_FAILURE; }
Can you confirm that you have modified the example with the requirements of your on-board flash device.
Regards,
Nitika
Hi Nitika,
I have added status = SystemP_SUCCESS after Bootloader_uniflashProcessFlashCommands, and the result returns success.
I'll look into the flash issue next week.
Thanks,
Jianyu
Hi Jianyu,
Thanks for the info, do let me know if you need any help later.
Regards,
Nitika
Hi Nitika,
Sorry I was assigned with another task this week. Maybe we can close this thread, and add another if new issue occurred.
Thanks,
Jianyu
Hi Nitika,
The current situation is that if customer adding "status = SystemP_SUCCESS" as mentioned above, the Ethernet boot is successful. However, they still have not resolved the flash problem yet.
Customer has another engineer also tried to resolve the flash issue last week but did not success.
I just have discussed with customer to fully close this topic, they will still look at this flash issue this week.
Currently the fail log for this flash issue is shown below.
May I know do you have some suggestions for customer to debug with?
Thanks,
Kevin
Hi Kevin,
With "status = SystemP_SUCCESS" change, once the Ethernet boot SBL completes. Can you ask the customer to switch to OSPI boot mode and check if the Hello world application runs?
I do not expect it to run as the uniflash issue might have led to the appImage not being flashed properly, still I would like to check this once.
I will loop in our Flash expert as well to provide any debug suggestions.
Regards,
Nitika
Hi Kevin,
One additional question, on which board is the customer testing this example - AM243x-lp or their custom board?
Regards,
Nitika
Hi Nitika,
Thanks for your help.
Customer is testing the example on their custom board.
Will update the result of running "Hello World" application later.
Thanks,
Kevin
Hi Nitika,
Customer just double check that after using "status = SystemP_SUCCESS" to avoid the flash issue, the result is not actually successful, it still has a problem shown in the last log below.
After digging into details, we found that this fail comes from below code line, and the status is -1.
status = Bootloader_parseMultiCoreAppImage(bootHandle, &bootImageInfo);
Do you think this problem is also due to the flash is not actually successful?
Thanks,
Kevin
Hi Kevin,
After digging into details, we found that this fail comes from below code line, and the status is -1.
status = Bootloader_parseMultiCoreAppImage(bootHandle, &bootImageInfo);
This aligns with my suspicion above - Bootloader_uniflashProcessFlashCommands function fails possibly even before flashing completes, which is why the appImage is not found in proper integrity and the example fails.
As a next step, we can check where exactly inside the Bootloader_uniflashProcessFlashCommands function does the failure come from with the steps below:
1. There is a loop_forever() function defined in main.c file. Add a call to this function before the below line in main.c:
Hi Kevin,
I am reading through this thread and I can provide my inputs in sometime.
Regards,
Vaibhav
Hi Kevin,
We can carry forward the debug from this point onwards: https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1423298/am2431-support-of-ethernet-primary-boot-backup-boot/5581232#5581232
Apart from this can you tell me the following:
Regards,
Vaibhav
Hi Vaibhav,
flash we are using is GD25Q64ESIG in 1S-1S-4S mode.
I find certLen = Bootloader_getX509CertLen(x509Header) = 0, which leads to a fail state of function Bootloader_parseMultiCoreAppImage(bootHandle, &bootImageInfo); by looking deeper I find value of x509_cert_ptr is 0x1F instead of 0x30, this gives certLen = 0:
Here is configuration from SysConfig:
Hi Nitika & Vaibhav,
We seem could narrow down this problem by figuring out why x509_cert_ptr returns value 0x1F instead of 0x30.
Could you help suggest some clue for us please?
Thanks,
Kevin
x509_cert_ptr returns value 0x1F instead of 0x30.
Firstly we need to see if the appimage being flashes is correct or not, then the verification would be right.
So, a typical HS FS appimage is going to look like this:
So we need to first confirm from memory browser if the image is starting as following: 0x30 0x82 and so on.
Can you do so and let me know?
Regards,
Vaibhav
Hi Vaibhav,
I checked the following 3 locations in memory browser, all showing 0:
0x60000000, 0x60080000, 0x60088000
Thanks,
Ellen
Hi Vaibhav,
Thanks for your reply.
As the the values are all 0, does that mean the appimage flash is not correct?
Thanks,
Kevin
0x60000000, 0x60080000, 0x60088000
You have looked at three of these locations.
Can you please check the location where your hello world appimage is flashed?
This should be a known offset at your end right?
If it is one of the above three which you have checked, and then you are seeing all 0s, then there are two possibilities:
To narrow down this problem, just before you check the memory browser, can you please go ahead and enable DAC in the following way?
You can do so by calling:
Hi Vaivhav,
Thanks for your reply.
This is information printed by uart, with offset being 0x80000, hello word appimage should be flashed at 0x60080000:
Also please be noted this function returns -1:
status = Bootloader_uniflashProcessFlashCommands(&uniflashConfig, &respHeader);
I tried to enable DAC before memory browser and this is what I got:
Data seems do not match hello word appimage.
Yours,
Ellen
Hi Ellen,
Yes, the hello world appimage you see after DAC enable is incorrect.
To make sure that the appImage received over ethernet is correct, can you share the memory browser values at 0x70090000 as well.
If this matches the hello world appImage, it means the appImage received is correct and flashing is the issue.
Regards,
Nitika
Hi Ellen,
The MSRAM values of the appImage looks to be correct. So the data received over Ethernet is not the issue.
Can you share the .json file of your flash and the example.syscfg file of your examples to understand what all has been modified on top of the original example?
Regards,
Nitika
Json file
{ "flashSize": 8388608, "flashPageSize": 256, "flashManfId": "0xC8", "flashDeviceId": "0x4017", "flashBlockSize": 65536, "flashSectorSize": 4096, "cmdBlockErase3B": "0xD8", "cmdBlockErase4B": "0xD8", "cmdSectorErase3B": "0x20", "cmdSectorErase4B": "0x20", "protos": { "p111": { "isDtr": false, "cmdRd": "0x03", "cmdWr": "0x02", "modeClksCmd": 0, "modeClksRd": 0, "dummyClksCmd": 0, "dummyClksRd": 0, "enableType": "0", "enableSeq": "0x00", "dummyCfg": null, "protoCfg": null, "strDtrCfg": null }, "p112": { "isDtr": false, "cmdRd": "0x3B", "cmdWr": "0x02", "modeClksCmd": 0, "modeClksRd": 0, "dummyClksCmd": 0, "dummyClksRd": 8, "enableType": "0", "enableSeq": "0x00", "dummyCfg": null, "protoCfg": null, "strDtrCfg": null }, "p114": { "isDtr": false, "cmdRd": "0x6B", "cmdWr": "0x32", "modeClksCmd": 0, "modeClksRd": 0, "dummyClksCmd": 0, "dummyClksRd": 8, "enableType": "6", "enableSeq": "0x00", "dummyCfg": null, "protoCfg": null, "strDtrCfg": null }, "p118": null, "p444s": null, "p444d": null, "p888s": null, "p888d": null, "pCustom": { "fxn": null } }, "addrByteSupport": "0", "fourByteAddrEnSeq": "0x00", "cmdExtType": "NONE", "resetType": "0x10", "deviceBusyType": "1", "cmdWren": "0x06", "cmdRdsr": "0x05", "srWip": 0, "srWel": 1, "cmdChipErase": "0xC7", "rdIdSettings": { "cmd": "0x9F", "numBytes": 3, "dummy4": 0, "dummy8": 0 }, "xspiWipRdCmd": "0x00", "xspiWipReg": "0x00000000", "xspiWipBit": 0, "flashDeviceBusyTimeout": 28000000, "flashPageProgTimeout": 512 }
sysconfig
/** * These arguments were used when this file was generated. They will be automatically applied on subsequent loads * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. * @cliArgs --device "AM64x" --part "Default" --package "ALV" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM64x@10.01.00" * @v2CliArgs --device "AM6442" --package "FCBGA (ALV)" --variant "AM6442-D" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM64x@10.01.00" * @versions {"tool":"1.22.0+3893"} */ /** * Import the modules used in this configuration. */ const eeprom = scripting.addModule("/board/eeprom/eeprom", {}, false); const eeprom1 = eeprom.addInstance(); const ethphy_cpsw_icssg = scripting.addModule("/board/ethphy_cpsw_icssg/ethphy_cpsw_icssg", {}, false); const ethphy_cpsw_icssg1 = ethphy_cpsw_icssg.addInstance(); const flash = scripting.addModule("/board/flash/flash", {}, false); const flash1 = flash.addInstance(); const bootloader = scripting.addModule("/drivers/bootloader/bootloader", {}, false); const bootloader1 = bootloader.addInstance(); const ddr = scripting.addModule("/drivers/ddr/ddr", {}, false); const ddr1 = ddr.addInstance(); const i2c = scripting.addModule("/drivers/i2c/i2c", {}, false); const i2c1 = i2c.addInstance(); const debug_log = scripting.addModule("/kernel/dpl/debug_log"); const dpl_cfg = scripting.addModule("/kernel/dpl/dpl_cfg"); const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); const mpu_armv71 = mpu_armv7.addInstance(); const mpu_armv72 = mpu_armv7.addInstance(); const mpu_armv73 = mpu_armv7.addInstance(); const mpu_armv74 = mpu_armv7.addInstance(); const mpu_armv75 = mpu_armv7.addInstance(); const default_linker = scripting.addModule("/memory_configurator/default_linker", {}, false); const default_linker1 = default_linker.addInstance(); const general = scripting.addModule("/memory_configurator/general", {}, false); const general1 = general.addInstance(); const region = scripting.addModule("/memory_configurator/region", {}, false); const region1 = region.addInstance(); const section = scripting.addModule("/memory_configurator/section", {}, false); const section1 = section.addInstance(); const section2 = section.addInstance(); const section3 = section.addInstance(); const section4 = section.addInstance(); const section5 = section.addInstance(); const section6 = section.addInstance(); const enet_cpsw = scripting.addModule("/networking/enet_cpsw/enet_cpsw", {}, false); const enet_cpsw1 = enet_cpsw.addInstance(); /** * Write custom configuration values to the imported modules. */ eeprom1.$name = "CONFIG_EEPROM0"; bootloader1.appImageOffset = "0x80000"; bootloader1.$name = "CONFIG_BOOTLOADER_FLASH0"; bootloader1.appImageBaseAddress = "0x60080000"; flash1.$name = "CONFIG_FLASH0"; bootloader1.flashDriver = flash1; flash1.device = "CUSTOM_FLASH"; flash1.fname = "GD25Q64ESIG"; flash1.flashBlockSize = 65536; flash1.flashSize = 8388608; flash1.flashManfId = "0xC8"; flash1.flashDeviceId = "0x4017"; flash1.cmdBlockErase3B = "0xD8"; flash1.cmdBlockErase4B = "0xD8"; flash1.cmdSectorErase3B = "0x20"; flash1.cmdSectorErase4B = "0x20"; flash1.dummyClksCmd = 0; flash1.xspiWipRdCmd = "0x00"; flash1.xspiWipReg = "0x00000000"; flash1.flashDeviceBusyTimeout = 28000000; flash1.enable4BAddr = false; flash1.cmdRd = "0x6B"; flash1.cmdWr = "0x32"; flash1.dummyClksRd = 8; flash1.flashQeType = "6"; flash1.cmdExtType = "NONE"; flash1.protocol = "1s_1s_4s"; flash1.proto_isAddrReg = false; flash1.dummy_isAddrReg = false; flash1.strDtr_isAddrReg = false; flash1.peripheralDriver.$name = "CONFIG_OSPI0"; flash1.peripheralDriver.inputClkFreq = 200000000; flash1.peripheralDriver.OSPI.D7.rx = false; flash1.peripheralDriver.OSPI.D7.$used = false; flash1.peripheralDriver.OSPI.D6.rx = false; flash1.peripheralDriver.OSPI.D6.$used = false; flash1.peripheralDriver.OSPI.D5.rx = false; flash1.peripheralDriver.OSPI.D5.$used = false; flash1.peripheralDriver.OSPI.D4.rx = false; flash1.peripheralDriver.OSPI.D4.$used = false; flash1.peripheralDriver.child.$name = "drivers_ospi_v0_ospi_v0_template0"; ddr1.$name = "CONFIG_DDR0"; ddr1.ddrConfigIncludeFileName = "drivers/ddr/v0/soc/am64x_am243x/board_lpddrReginit.h"; i2c1.$name = "CONFIG_I2C1"; i2c1.I2C_child.$name = "drivers_i2c_v0_i2c_v0_template1"; const i2c2 = i2c.addInstance({}, false); i2c2.$name = "CONFIG_I2C0"; eeprom1.peripheralDriver = i2c2; i2c2.I2C_child.$name = "drivers_i2c_v0_i2c_v0_template0"; debug_log.enableUartLog = true; debug_log.enableCssLog = false; debug_log.uartLog.$name = "CONFIG_UART0"; debug_log.uartLog.intrEnable = "DISABLE"; debug_log.uartLog.UART.$assign = "USART0"; const uart_v0_template = scripting.addModule("/drivers/uart/v0/uart_v0_template", {}, false); const uart_v0_template1 = uart_v0_template.addInstance({}, false); uart_v0_template1.$name = "drivers_uart_v0_uart_v0_template0"; debug_log.uartLog.child = uart_v0_template1; mpu_armv71.$name = "CONFIG_MPU_REGION0"; mpu_armv71.size = 31; mpu_armv71.attributes = "Device"; mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; mpu_armv71.allowExecute = false; mpu_armv72.$name = "CONFIG_MPU_REGION1"; mpu_armv72.size = 15; mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; mpu_armv73.$name = "CONFIG_MPU_REGION2"; mpu_armv73.baseAddr = 0x41010000; mpu_armv73.size = 15; mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; mpu_armv74.$name = "CONFIG_MPU_REGION3"; mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; mpu_armv74.baseAddr = 0x70000000; mpu_armv74.size = 21; mpu_armv75.$name = "CONFIG_MPU_REGION4"; mpu_armv75.baseAddr = 0x80000000; mpu_armv75.size = 31; default_linker1.$name = "memory_configurator_default_linker0"; general1.$name = "CONFIG_GENERAL0"; general1.entry_point = "-e_vectors_sbl"; general1.irq_stack_size = 4096; general1.svc_stack_size = 256; general1.linker.$name = "TIARMCLANG0"; region1.$name = "MEMORY_REGION_CONFIGURATION0"; region1.memory_region.create(8); region1.memory_region[0].type = "TCMA_R5F"; region1.memory_region[0].$name = "R5F_VECS"; region1.memory_region[0].size = 0x40; region1.memory_region[0].auto = false; region1.memory_region[1].type = "TCMA_R5F"; region1.memory_region[1].$name = "R5F_TCMA"; region1.memory_region[1].size = 0x7FC0; region1.memory_region[2].type = "TCMB_R5F"; region1.memory_region[2].$name = "R5F_TCMB0"; region1.memory_region[2].size = 0x8000; region1.memory_region[3].$name = "MSRAM_VECS"; region1.memory_region[3].auto = false; region1.memory_region[3].size = 0x100; region1.memory_region[4].$name = "MSRAM_0"; region1.memory_region[4].auto = false; region1.memory_region[4].manualStartAddress = 0x70000100; region1.memory_region[4].size = 0x6FF00; region1.memory_region[5].$name = "MSRAM_1"; region1.memory_region[5].auto = false; region1.memory_region[5].manualStartAddress = 0x70070000; region1.memory_region[5].size = 0x20000; region1.memory_region[6].$name = "MSRAM_2"; region1.memory_region[6].size = 0x148000; region1.memory_region[7].$name = "MSRAM_3"; region1.memory_region[7].size = 0x8000; section1.$name = "Vector Table"; section1.group = false; section1.load_memory = "MSRAM_VECS"; section1.output_section.create(1); section1.output_section[0].$name = ".vectors"; section1.output_section[0].palignment = true; section2.$name = "Text Segments"; section2.load_memory = "MSRAM_0"; section2.output_section.create(7); section2.output_section[0].palignment = true; section2.output_section[0].$name = ".text"; section2.output_section[1].palignment = true; section2.output_section[1].$name = ".text.hwi"; section2.output_section[2].palignment = true; section2.output_section[2].$name = ".text.cache"; section2.output_section[3].palignment = true; section2.output_section[3].$name = ".text.mpu"; section2.output_section[4].palignment = true; section2.output_section[4].$name = ".text.boot"; section2.output_section[5].$name = ".data"; section2.output_section[5].palignment = true; section2.output_section[6].$name = ".rodata"; section2.output_section[6].palignment = true; section3.$name = "Memory Segments"; section3.group = false; section3.load_memory = "MSRAM_1"; section3.output_section.create(3); section3.output_section[0].$name = ".bss"; section3.output_section[0].palignment = true; section3.output_section[0].output_sections_start = "__BSS_START"; section3.output_section[0].output_sections_end = "__BSS_END"; section3.output_section[1].$name = ".sysmem"; section3.output_section[1].palignment = true; section3.output_section[2].$name = ".stack"; section3.output_section[2].palignment = true; section4.$name = "Stack Segments"; section4.load_memory = "MSRAM_1"; section4.output_section.create(5); section4.output_section[0].$name = ".irqstack"; section4.output_section[0].output_sections_start = "__IRQ_STACK_START"; section4.output_section[0].output_sections_end = "__IRQ_STACK_END"; section4.output_section[0].input_section.create(1); section4.output_section[0].input_section[0].$name = ". = . + __IRQ_STACK_SIZE;"; section4.output_section[1].$name = ".fiqstack"; section4.output_section[1].output_sections_start = "__FIQ_STACK_START"; section4.output_section[1].output_sections_end = "__FIQ_STACK_END"; section4.output_section[1].input_section.create(1); section4.output_section[1].input_section[0].$name = ". = . + __FIQ_STACK_SIZE;"; section4.output_section[2].$name = ".svcstack"; section4.output_section[2].output_sections_start = "__SVC_STACK_START"; section4.output_section[2].output_sections_end = "__SVC_STACK_END"; section4.output_section[2].input_section.create(1); section4.output_section[2].input_section[0].$name = ". = . + __SVC_STACK_SIZE;"; section4.output_section[3].$name = ".abortstack"; section4.output_section[3].output_sections_start = "__ABORT_STACK_START"; section4.output_section[3].output_sections_end = "__ABORT_STACK_END"; section4.output_section[3].input_section.create(1); section4.output_section[3].input_section[0].$name = ". = . + __ABORT_STACK_SIZE;"; section4.output_section[4].$name = ".undefinedstack"; section4.output_section[4].output_sections_start = "__UNDEFINED_STACK_START"; section4.output_section[4].output_sections_end = "__UNDEFINED_STACK_END"; section4.output_section[4].input_section.create(1); section4.output_section[4].input_section[0].$name = ". = . + __UNDEFINED_STACK_SIZE;"; section5.$name = "File buffer"; section5.load_memory = "MSRAM_2"; section5.output_section.create(1); section5.output_section[0].$name = ".bss.filebuf"; section6.$name = "Scratch pad"; section6.load_memory = "MSRAM_3"; section6.output_section.create(1); section6.output_section[0].$name = ".bss.sbl_scratch"; enet_cpsw1.$name = "CONFIG_ENET_CPSW0"; enet_cpsw1.RtosVariant = "NoRTOS"; enet_cpsw1.macAddrConfig = "Manual Entry"; enet_cpsw1.LargePoolPktCount = 16; enet_cpsw1.hostportTxCsumOffloadEn = false; enet_cpsw1.hostporRxDscpIPv4RemapEn = false; enet_cpsw1.hostportRemoveCrc = true; enet_cpsw1.hostpostPassCrcErrors = true; enet_cpsw1.DisableMacPort1 = true; enet_cpsw1.macAddrList = "88:0c:e0:67:d6:0e,88:0c:e0:67:d6:0e"; enet_cpsw1.phyToMacInterfaceMode = "RMII"; enet_cpsw1.MDIO.MDC.$assign = "PRG1_MDIO0_MDC"; enet_cpsw1.MDIO.MDIO.$assign = "PRG1_MDIO0_MDIO"; enet_cpsw1.txDmaChannel[0].$name = "ENET_DMA_TX_CH0"; enet_cpsw1.txDmaChannel[0].PacketsCount = 8; enet_cpsw1.rxDmaChannel[0].$name = "ENET_DMA_RX_CH0"; enet_cpsw1.rxDmaChannel[0].PacketsCount = 8; ethphy_cpsw_icssg1.$name = "CONFIG_ENET_ETHPHY0"; enet_cpsw1.ethphy2 = ethphy_cpsw_icssg1; ethphy_cpsw_icssg1.phySelect = "DP83826"; ethphy_cpsw_icssg1.phyAddr = 7; ethphy_cpsw_icssg1.skipExtendedConfig = true; const udma = scripting.addModule("/drivers/udma/udma", {}, false); const udma1 = udma.addInstance({}, false); enet_cpsw1.udmaDrv = udma1; /** * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to * re-solve from scratch. */ flash1.peripheralDriver.OSPI.$suggestSolution = "OSPI0"; flash1.peripheralDriver.OSPI.CLK.$suggestSolution = "OSPI0_CLK"; flash1.peripheralDriver.OSPI.CSn0.$suggestSolution = "OSPI0_CSn0"; flash1.peripheralDriver.OSPI.DQS.$suggestSolution = "OSPI0_DQS"; flash1.peripheralDriver.OSPI.D3.$suggestSolution = "OSPI0_D3"; flash1.peripheralDriver.OSPI.D2.$suggestSolution = "OSPI0_D2"; flash1.peripheralDriver.OSPI.D1.$suggestSolution = "OSPI0_D1"; flash1.peripheralDriver.OSPI.D0.$suggestSolution = "OSPI0_D0"; i2c1.I2C.$suggestSolution = "I2C1"; i2c1.I2C.SCL.$suggestSolution = "I2C1_SCL"; i2c1.I2C.SDA.$suggestSolution = "I2C1_SDA"; i2c2.I2C.$suggestSolution = "I2C0"; i2c2.I2C.SCL.$suggestSolution = "I2C0_SCL"; i2c2.I2C.SDA.$suggestSolution = "I2C0_SDA"; debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; enet_cpsw1.MDIO.$suggestSolution = "MDIO0"; enet_cpsw1.RMII.$suggestSolution = "CPSW"; enet_cpsw1.RMII.RMII_REF_CLK.$suggestSolution = "PRG1_PRU0_GPO10"; enet_cpsw1.RMII.RMII2_CRS_DV.$suggestSolution = "PRG1_PRU1_GPO13"; enet_cpsw1.RMII.RMII2_RX_ER.$suggestSolution = "PRG1_PRU1_GPO4"; enet_cpsw1.RMII.RMII2_RXD0.$suggestSolution = "PRG1_PRU1_GPO0"; enet_cpsw1.RMII.RMII2_RXD1.$suggestSolution = "PRG1_PRU1_GPO1"; enet_cpsw1.RMII.RMII2_TXD0.$suggestSolution = "PRG1_PRU1_GPO11"; enet_cpsw1.RMII.RMII2_TXD1.$suggestSolution = "PRG1_PRU1_GPO12"; enet_cpsw1.RMII.RMII2_TX_EN.$suggestSolution = "PRG1_PRU1_GPO15";
Hi Nitika,
please find .json file and example.syscfg above uploaded by Jianyu.
I have also attached screen shot of flash configuration from SysConfig above(please refer to my reply on DEC 25, 2024).
Many thanks for your help:)
Yours,
Ellen
Hi Ellen,
Thanks for your response.
I have also attached screen shot of flash configuration from SysConfig above
I have already seen this, but other things like OSPI configurations and other Flash configurations(in detailed are not visible), hence the example.syscfg file was requested.
Allow me sometime to go through the attached files and get back to you with the next steps.
Regards,
Vaibhav
Hi Ellen,
I have check the datasheet for the flash part and it mentions that the clock frequency should be no more than 133 MHz/120 MHz for the dummy cycle configuration of 8.
Here we have the dummy clock reads as 8, so the frequency should be changed, in your case, the frequency is set to 200 MHz in OSPI section from SysConfig.
Once you have the OSPI section opened, your clock frequency should be set to 133 MHz = 133333333, Clock Divider: 4, Disable DMA, Disable Phy Mode.
Please let me know, if you can see the hello world flashed correctly upon enabling DAC mode with the above changes.
NOTE:
If not, then we can do a sanity checking by switching mode of operation to 1S-1S-1S and then checking if the hello world is flashed correctly.
Regards,
Vaibhav
Hi Vaibhav,
thank you for the detailed suggestion, here are my results:
Clock divider: 4, Disable DMA, Disable PHY, mode: 1S-1S-4S, clock 133MHz/120MHz:
Clock divider: 4, Disable DMA, Disable PHY, mode: 1S-1S-1S, clock 133MHz/120MHz:
data at location 0x70090000 keeps consistent for all scenarios as:
Can you please help and check the data?
Many thanks!
Yours,
Ellen
Hi Ellen,
Thanks for your response.
1S-1S-1S
When you switched this mode of operation did you make sure to change the SysConfig Flash other settings as well? Or you just went ahead and selected the dropdown as 1S-1S-1S from 1S-1S-4S(earlier one)?
The other settings I am talking about is:
FYI, the value from flash as seen with 1s-1s-4s is incorrect and the value for 1s-1s-1s(hello world seems to be not flashed at all, and the bootloader image we need to confirm). Can you please check the hex dump of bootloader image and compare it with the 0x60000000 in 1s-1s-1s mode.
Looking forward to your response.
Regards,
Vaibhav