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TMS570LS3137: TX/RX MibSpi with DMA and long transfer

Part Number: TMS570LS3137
Other Parts Discussed in Thread: HALCOGEN

Tool/software:

Hello,

I am trying to transfer 384 words using the MibSpi and DMA modules. I understand that since the transfer group buffers are only 128 words long, it would require 3 DMA transfers to achieve this. However I could not wrap my head around how to get this to work.

I tried setting the ICOUNTx bits in the DMAxCTRL to 2 (so 3 DMA transfers) but am not sure how to configure the configure the DMA channel configuration accordingly. Do you maybe have some example code for this use case?

Thank you and best regards,

Aaron

  • Hi Aaron,

    Maybe it is difficult to transfer 384 words to the MibSPI RAM group of size 128 words using single DMA channel.

    Maybe you can try below method:

    Configure 3 DMA channels and chain the channels.

      

    For example assume that you declared a RAM of size 384 words, so configure the first channel to send 1 to 128 words to the MibSPI RAM group of size 128 and after transferring this will trigger the next channel in the chain and this next channel source address should be point to the 129th word of 384 words and this channel should send next 128 words they are from 129 to 256 and after transferring next 128 this channel should trigger the next DMA channel in the chain and the third DMA channel should send the next 128 words.

    Try this method and let me know if you face any difficulty in developing it.

    --
    Thanks & regards,
    Jagadish.

  • Hi Jagadish,

    Thank you for your reply and recommendation. I will try this solution and give you an update.

    On a side note, I was wondering if a solution similar as the one provided in this thread could work also in my case. What do you think? Is there maybe a way to still access the example code that is shared in the thread?

    Thanks and regards,

    Aaron

  • Hi Aaron,

    On a side note, I was wondering if a solution similar as the one provided in this thread could work also in my case. What do you think? Is there maybe a way to still access the example code that is shared in the thread?

    My suggested method is different from the one mentioned in above thread.

    In my method i am not suggesting using single buffer for transfer group and instead of i am suggesting using 128 buffers for transfer group.

    Again, i felt there is a drawback for above method, i mean if we are using single buffer instead of group of buffers then why we should need to use MibSPI for this? we can use SPI only right?

    We can simply configure them into SPI and can configure one DMA channel and can transfer required number of words using single DMA channel. So instead of configuring single buffer for MibSPI, using SPI is easy on my understanding.

    --
    Thanks & regards,
    Jagadish.

  • Hello Jagadish,

    Sorry, I need to correct my initial use case. What I am trying to do is to first transmit 4 words on SPI and then after to receive N * 8 words (where N is at most 32, so 256 words in the worst case). Currently I am using the SPI module for this, but I am trying to find a way to reduce the CPU usage, so I thought of using the MibSPI with the DMA. What would be your recommendation on proceeding with this?

    Thank you and regards,

    Aaron

  • Hello Jagadish,

    Is there any recommendation from your side on how to achieve this? I was thinking of using the MibSpi module since I understood that it allows for the least CPU usage during the data transfer, but maybe it's better with the Spi module?

    Thank you for your help,

    Aaron

  • HI Aaron,

    Apologies for the delay in late response. I was stuck with other issues in this mean time.

    I think we cannot easily change the transfer group size in MibSPI,  this is because it would affect the next transfer group size also.

    The transfer group end address is depending on the next transfer group start address.

    If you see the mibspiSetData function definition here the end address for transfer group is calculating using start address of the next transfer group.

    Maybe you can try below methods:

    1. You can declare different size of transfer groups in HALCoGen, example one TG0 with 4 frames and TG1 with 32 and TG2 with 64 and TG3 with 128 etc

    So first you can do a transfer of 4 frames using TG0, you will set the data using mibspiSetData and then you can call the mibspiTransfer API to initiate the transfer.

    After that you need to read the 128 bytes then you need send some dummy data of 128 bytes to slave example all zeros, you can initialize the dummy data of 128 frames using TG3 which is size of 128 and then you can initiate the transfer using  mibspiTransfer. After the transmission successful, you just need to call the mibspiGetData to receive your data into a buffer for processing.

    2. The other way is just using TG0 for all transfer, i mean to adjust the TG0 size from 4 to 128,

    you can do the following thing; you can change the TG1 transfer buffer size.

    For example, if i keep the TG1 start address as 4 then TG0 can be loaded with 4 frames and then you can set data using mibspiSetData and then you can transfer 4 frames using mibspiTransfer. Similarly, you can keep the TG1 start address as 128 and can do the same process.

    --
    Thanks & regards,
    Jagadish.

  • Hello Jagadish,

    Sorry for the late response, I managed to find a solution and then forgot to come back to this thread.

    In the end I implemented a similar solution as described in this thread: TMS570LS1224: Looking for Example Code for Long DMA Transfers to single buffer in MibSpi Mode - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums. It is working fine based on my required use case and found it to be the most flexible solution.

    Thank you and best regards,

    Aaron