AM263P4-Q1: Issue with enabling XIP on AM263P4

Hi Nilabh 

Thanks for your reply. Unfortunately, that does not solve the problem. I removed OSPI from the project but end up having the same issue.

For context I added it to find a way to put the OSPI in DAC mode so that it is visible by the CPU.

But following the instruction in the threads about XIP, it does not seem necessary to do this. And when you look at the program flow, the abort when jumping to DPL_Init() function which is happening much earlier than any OSPI init.

One thing does not make sense to me in the example and instructions given on line.

The example project will have a flash region located at 0x60100000. The prebuilt bootloader expect the application to be flashed at offset 0x81000.

But when you look at the disassembly where the abort happens, the instruction is located at 0x60112BE1.

The application has a size in flash of 0x10b18. Being flashed at 0x81000, max address in flash should be 0x91b18 and seen by the CPU 0x60091b18.

If my understanding is correct, there is effectively no instruction @ 0x60112BE1.

However, when I change the flash location to start at 0x60081000 to align with the flashing location, I get SBL fail error message.

I'll dig into this further but would be great to have a detailed example explaining how things are meant to work and how flashing location should align application memory mapping.

Looking forward to reading from you.

Regards

Seb

Further digging my side:

- when aligning the start of the flash region in sysconfig to 0x60081000, as mentioned above, I get the SBL fail message. This is caused by the read in SBL at address 0x81000 not returning the correct header markers.

Application image - Flash region starting at 0x60100000 print is matching the XIP file

==> Switch to the application does not work. End up in prefetch abort

Application flash aligned to flashing script location :

Image is truncated by 72 bytes !!

SBL fails to recognize the header as mentioned at the top

Adding 72 bytes to start position in flash

Adding 256 bytes to flash start location:

The start address for the flasher seems to need to be aligned to 0x1000

Image is not truncated ie print & image file hex view matches

This time the application is stuck here:

Enabling DAC mode seems only to be part the function Bootloader_verifyMulticoreImage () which is not performed. Also this config is set to 0:

Same for PHY enabling in main.c. In gOspiHandle, the config is set to 0

DAC mode into the flash Args structure is not set -> Value 0 by default

I can't find a way of enabling DAC mode.

we need a clear explanation about :
- SBL and application interactions
- Application image alignment requirements vs SBL (not just alignment with flashing location)
- How when running in XIP the SW retrieves the correct address for the instruction if there is no alignment ?
- How PHY And DAC modes are getting enabled in SBL as SysCfg parameters don’t seem to be reflected into the code
- Also the dac mode enabling seems to be linked to the image requiring authentication but I can’t see any parameter in sysconfig to enable this
- Do we really authentication active to enable XIP

We need your help in understanding the details steps in getting this to work. The documentation is too light about this.

Sebastien Chapeau said:

I can't find a way of enabling DAC mode.

To enable DAC mode you can use this API:

Sebastien Chapeau said:

- Application image alignment requirements vs SBL (not just alignment with flashing location)
- How when running in XIP the SW retrieves the correct address for the instruction if there is no alignment ?
- How PHY And DAC modes are getting enabled in SBL as SysCfg parameters don’t seem to be reflected into the code
- Also the dac mode enabling seems to be linked to the image requiring authentication but I can’t see any parameter in sysconfig to enable this
- Do we really authentication active to enable XIP

For SBL and application interaction I would recommend you  to go through this: Secondary Bootloader flow in AM26x devices

We need the code and RO-Data to be aligned when you are using XIP

PHY mode enablement happens via syscfg and SBL configures the DAC mode for XIP execution, you can refer to SBL OSPI example for reference

Image authentication is applicable to only secure device(HSSE), not for unsecure device

Non Authentication is not required for XIP.

Can you tell me which example are you trying for XIP and the SBL , better if you can share the syscfg file.

Hi Nilabh

Thanks for your answer.

I already went through the bootflow. I can make it work perfectly fine when the code stays in RAM.

So far no success getting this app to run in XIP.

The documentation explain well the bootflow when the code run from RAM but not for XIP nor when the SBL has loaded the application partially in RAM how instruction address are retrieved. Alignment between flashing location and application flash configuration.

How would that behave when you have 2 applications and you need to switching to one another at start up (ie the SBL will load one or the other ...)

Can't see anything related to nor on the academy nor the forums nor on the docs.

Attached 3 projects. One is the bootloader I testing with. Then you have 2 LED blinking project for the AM263P launchpad. One is configured to work form RAM.

The other (*_XIP*) is configured to work in XIP. It would contain the last setting I tried. See posts above.

To flash I'm putting the board into serial boot mode and uses the uniflash_uart.py script, the config file is in the XIP project.

Looking forward to read from you.

Regards

Seb

0317.Project.zip