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There is a significant difference between single-core and multi-core applications.
I have designed an application that utilizes all the cores of the AM2434. In this application, the first core manages 1GB UDP communication, while another core processes the received messages and returns the output messages to Core R00, which then sends them back to the host via Ethernet UDP.
I discovered that the SDK examples provided were not very helpful in this process, as activating the multi-core processor is a complex task. Handling aspects like cache coherency, shared memory, DMA, and non-cacheable segment zones is challenging. However, providing clear and practical examples for such tasks could save customers significant time and effort.
Currently, I am finalizing my basic inter-processor communication, which has taken me more than a week. I believe that if TI were to offer examples like these, it would make the Sitara family more appealing and user-friendly to customers.
