RM46L852: RM46 Bootloader Flash F021 Flash API related issues

Hi Srividya,

Here is a tested CAN bootloader example on RM46x:

RM46x_CAN_Bootloader.zip

Can you please take this example as a reference and verify your code with this example?

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Thanks & regards,
Jagadish.

Thanks for your suggestion.

i have taken the same example code after erase operation if i check the FSM ready status that is fine and  for Get FSM Status (Fapi_GetFsmStatus();) it is giving result as 0x00004010

kindly suggest me where am i  doing wrong

Regards,

Srividya

Hi Srividya,

Srividya said:

i have taken the same example code after erase operation if i check the FSM ready status that is fine and  for Get FSM Status (Fapi_GetFsmStatus();) it is giving result as 0x00004010

Same example code should work because they are tested examples.

Is it possible to share your complete project to test from my end, you can send it through private chat as well.

--
Thanks & regards,
Jagadish.

Dear Jagadish,

 Below is my linker command file, My flash erase operation is resulting an undefined error if my app start address is 0x40000 suggest me where am i doing wrong.

--retain="*(.intvecs)"

MEMORY
{
VECTORS (X) : origin=0x00000000 length=0x00000020
FLASH_API (RX) : origin=0x00000020 length=0x0003ffE0
FLASH0 (RX) : origin=0x00040000 length=0x009FFE0 //LS31x and RM48 Flash size is 0x300000
SRAM (RW) : origin=0x08002000 length=0x0002D000
STACK (RW) : origin=0x08000000 length=0x00002000
}
/* USER CODE BEGIN (3) */
ECC
{
algoL2R4F021 : address_mask = 0xfffffff8 /* Address Bits 31:3 */
hamming_mask = R4 /* Use R4/R5 build in Mask */
parity_mask = 0x0c /* Set which ECC bits are Even and Odd parity */
mirroring = F021 /* RM57Lx and TMS570LCx are build in F021 */
}
/* USER CODE END */
SECTIONS
{
.intvecs : {} > VECTORS
flashAPI :
{
F021_API\Fapi_UserDefinedFunctions.obj (.text)
bl_flash.obj (.text)
library= F021_API_CortexR4_LE_V3D16.lib 
} load = FLASH_API, run = SRAM, LOAD_START(api_load), RUN_START(api_run), SIZE(api_size)

.text > FLASH0
.const > load = FLASH0, run = SRAM, LOAD_START(Constloadstart), RUN_START(ConstRunStart), SIZE(ConstLoadSize)

.cinit > FLASH0
.pinit > FLASH0
.data > SRAM
.bss > SRAM

.sysmem : { } > SRAM

FEE_TEXT_SECTIONS : { } > FLASH0 

FEE_CONST_SECTIONS : { } > FLASH0 

FEE_DATA_SECTIONS : { } > FLASH0 

}

Hi Srividya,

This seems to be okay for me, 

can we setup one live debugging session at least, for better understanding of code?

I will be available from 10AM to 8PM IST, you can setup the meeting based on your availability.

Note: I am not working on tomorrow (31-JAN-25).

--
Thanks & regards,
Jagadish.

Hi Srividya,

As we discussed in the call,

please try to use below code for the testing:

(+) [FAQ] TMS570LC4357: Examples and Demos available for Hercules Controllers (E.g. TMS570x, RM57x and RM46x etc) - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

In this code I am trying to write in the same back (BANK-0) where API routines are executing and here, we are copying the FAPI routines to the RAM before executing them. This is tested code, so try to follow the same method with your code as well to avoid data abort.

--
Thanks & regards,
Jagadish.