AM2634: Arm-based microcontrollers forum

TEMC

Intellectual 955 points

Part Number: AM2634

Tool/software:

Hi,

We are using AM2634 with custom designed hardware and CC Studio version 12.7.0.00007 with XDS110 Debugger.

And we are facing an issue while configuring FSI peripheral and we are getting the following assert

[Cortex_R5_0] ASSERT: 0.10s: soc/am263x/soc_rcm.c:SOC_rcmGetModuleClkDivVal:1443: (inFreq % outFreq) == 0 failed !!!

To find what is causing the error we checked the PLL Configuration and the PLL output is being configured to 800Mhz instead of 2000Mhz with N = 11U,M2 = 1U,M = 384U.

To Configure the PLL we are currently using GEL files only we also tried to reconfigure the core PLL with GEL file scripts provided and also tried to reconfigure them in our code but we are still getting the assert.

7 months ago

0 Sahana H G 7 months ago

TI__Expert 5426 points

Hi TEMC,

Could you please confirm the following:

1. Are you using the default gels provided in <ccs_installation_directory>\ccs\ccs_base\emulation\gel\AM263x\AM263_PLL ?

FSI peripheral uses the CONTROLSS_PLL, which should be configured to use "DPLL_CORE_HSDIV0_CLKOUT2" which would provide an output of 400MHz. The CORE PLL is configured by default in this way in the GELS provided. I'm also assuming that you've configured your board to use the No Boot mode, and not the QSPI Boot mode.

Regards,

Sahana

0 TEMC 7 months ago in reply to Sahana H G

Intellectual 955 points

Yes we have used default gel scripts only to configure the PLL with boot mode as devboot or no boot mode

0 Sahana H G 7 months ago in reply to TEMC

TI__Expert 5426 points

It's not clear if you're running an example from the SDK without any modifications. Could you please run any FSI example available on the SDK (for example, AM263x MCU+ SDK: FSI Loopback Dma), and check if you see the same error?

0 TEMC 7 months ago in reply to Sahana H G

Intellectual 955 points

Yes we have tried with SDK code also without any modifications but still facing that same error

+1 Sahana H G 7 months ago in reply to TEMC

TI__Expert 5426 points

I'm unable to reproduce this on AM263-LP. Could you read the register SOP_MODE_VALUE in TOP_RCM (Address: 0x53200024) and confirm that it reads 0xB (i.e. Dev-boot mode)?