Tool/software:
Dear Texas Instruments Support Team,
We are currently working on communication between the AM2632 (via FSI interface) and an FPGA. During testing, we observed that no clock signal is generated when there is no data transmission, which causes the FPGA to fail in processing received data. To further debug this issue, we would like to inquire if TI provides FPGA-side test/reference code for FSI communication with the AM2632.
Could you kindly share any relevant example code, application notes, or configuration guidelines to help us resolve this clock synchronization issue? Additionally, we would appreciate insights into whether this behavior (absence of clock during idle states) is expected or requires specific settings to maintain a continuous clock.
Thank you for your support. Please let us know if further details are needed.
Best regards,
zx
