AM2431: GPMC NAND Flash

Yashasvini Krishnaiah

Part Number: AM2431

Tool/software:

We were checking feasibility of using GPMC NAND Flash in out design. Few queries regarding this:

1. Since GPMC pins are multiplexed with Bootmode pins. Additional Buffer component is used in most of the EVMs for initial latching of boot mode pins. Below E2E query mentions that additional Buffer component may not be required. Can you please provide any reference design where Bootmode pins are used in addition for memory interface and Buffer is not provided. Please confirm whether testing of this design without Buffer component is done.

[FAQ] AM625 / AM623 / AM644x / AM243x / AM62A / AM62P / AM62D-Q1 / AM62L - Bootmode implementation without buffers - Processors forum - Processors - TI E2E support forums

2. Suggest the list of NAND Flash components supported by AM2431 GPMC.

5 months ago

0 Kallikuppa Sreenivasa 5 months ago

TI__Guru**** 193219 points

Hello Yashasvini Krishnaiah

Thank you for the query.

All the EVMs or the SKs support test automation and so the bootmode buffers are used.

We have most customer not using the bootmode buffers.

The suggestion is to connected the pullups directly to bootmode inputs and connect the alternate function through 0R to be able to isolate.

Pls, Refer to the FAQ that has been attached in the message above.

Regards,

Sreenivasa

0 Yashasvini Krishnaiah 4 months ago in reply to Kallikuppa Sreenivasa

Prodigy 30 points

Thanks for the response.

Could you please respond to query number 2.

Also please let us know since GPMC pins are used to latch bootmode, these pins can be used to interface with NAND Flash which will be used as boot Flash.

0 Kallikuppa Sreenivasa 4 months ago in reply to Yashasvini Krishnaiah

TI__Guru**** 193219 points

Hello Yashasvini Krishnaiah

Thank you.

Yashasvini Krishnaiah said:
Also please let us know since GPMC pins are used to latch bootmode, these pins can be used to interface with NAND Flash which will be used as boot Flash.

The GPMC signals connect to the data IO signals. of the memory.

Please follow the below FAQ

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1391522/faq-am625-am623-am644x-am243x-am62a-am62p-am62d-q1-am62l---bootmode-implementation-without-buffers

Yashasvini Krishnaiah said:
2. Suggest the list of NAND Flash components supported by AM2431 GPMC.

We do not make part suggestions.

The information of the Nand board tested is added to the FAQ

(+) [FAQ] AM2434, AM2432, AM2431 (ALV, ALX packages) Custom board hardware design – Collaterals to Get started - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

Regards,

Sreebuvasa

0 Yashasvini Krishnaiah 4 months ago in reply to Kallikuppa Sreenivasa

Prodigy 30 points

Hello Sreenivasa,

Thanks for the response. Understood that GPMC signals connect to data IO signals of memory. I will try to elaborate my query:

a. Bootmode pins will be treated as input to MCU during reset and will be latched

b. Same lines will be used to access boot memory NAND Flash.

Whether this situation works fine.

0 Kallikuppa Sreenivasa 4 months ago in reply to Yashasvini Krishnaiah

TI__Guru**** 193219 points

Hello Yashasvini Krishnaiah

Thank you.

Yashasvini Krishnaiah said:
a. Bootmode pins will be treated as input to MCU during reset and will be latched

I am not sure what you meant by MCU.

the processor bootmode pins are by default configured as inputs to latch the configured bootmode.

The bootmode can be configured using pullup or pulldown.

Yashasvini Krishnaiah said:
b. Same lines will be used to access boot memory NAND Flash.

After the bootmode inputs are latched ( rising edge of PORz_OUT), these IOs can be configured for the available alternate function.

There are a number of customer following this approach.

The FAQ linked above can be considered for implementation.

Regards,

Sreenivasa