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MSPM0L1306: POR IO state vs BOOTRST IO state

Part Number: MSPM0L1306

Tool/software:

Hello,

So I've been looking at the IO state on reset again, and I think there's a case that isn't clear in the TRM what the state of the IO will be.

The case is if you're using the nRST signal to reset the MCU you can either generate a POR where it is clear in the TRM that the IO pins will be Hi-Z, but if you assert nRST for less than 1 second you go into BOOTRST which doesn't indicate if the IOs are reset to Hi-Z? It just says that you run the BCR and eventually end up in RUN. But what happens when the MCU has configured IO and then gets reset? 

Is Hi-Z the default unless latched by the SHUTDOWN mode? 

Munan

  • Hi Munan,
    Based on the information inside section 2.4.1.1.3 Boot Reset (BOOTRST) Reset Level of the TRM, the only things that are not reset by a BOOTRST are the following: The shutdown memory (SHUTDNSTOREx), the NRST disable state, and the the SWD disable state. I think it's safe to assume that the IO pins will be reset after a BOOTRST since that is not included in the previous list.

    Best Regards,

    Diego Abad

  • Hey Diego,

    Ok, can we make that clearer in the TRM somehow? I don't like how we detail this explicitly for POR, but then it's implied for the BOOTRST level.

    Munan

  • Hi Munan,
    I definitely see your point. So far, the SHUTDOWN mode is the only BOOTRST that will allow I/Os to remain in the same state (though the configuration is lost), and a BOR generated by a POR will make it go to default mode. Let me talk with my design team about it and request more information on whether the nRST cause for a BOOTRST falls in this category of resetting the I/Os. After I confirm with them, I'll make sure to pass this note to the systems team to add it to the TRM.
    Best Regards,
    Diego Abad

  • Hi Muman,
    I confirmed with my team that the IOMUX is not reset when a BOOTRST is triggered through NRST. I'll ask our systems team to make a note on this.

    Best Regards,

    Diego Abad