AM2634: configure 2 netif in noRtos project

Hi Rohal,

1. Would it be possible to share your code (project as zip).

2. Based on the Lwip_stats screenshot shared above, it is clear that LWIP_STAT has received no packets. The flow for packet receiving is as follows

Right now, there are no packets reaching the LwIP stack. If there is some config issue, the packets should be dropped at CPSW hardware level

We will have to go a level deeper to see if the hardware switch (CPSW) received any packets and check CPSW Stats. Can you also share your CPSW Stats. In your expression window, you can paste *(CSL_Xge_cpswRegs ) 0x52820000

Then expand and see:

1. Packet drops at Host port (port connected to R5F HOST). Check the P0_STATS

2. Packet drops at MAC port (in this case since both MAC ports are enabled, check stats for both PN_STATS[0] and PN_STATS[1]

You will either be able to see drops or see goodframes received

For more details and steps, follow: https://dev.ti.com/tirex/explore/node?node=A__AEIJm0rwIeU.2P1OBWwlaA__AM26X-ACADEMY__t0CaxbG__LATEST

If you see all the CPSW stats zero as well, it means there is some issue in hardware/layout/setup.

If there are drops at CPSW level, we need to check the CPSW configurations in your application.

Regards,
Shaunak

If using Out-of-box example from MCU_PLUS_SDK (enet_cpsw_rawhttpserver)

I tested on v10.02 release using AM263x-CC, I am able to ping the DUT

Regards,
Shaunak

enet_cpsw_rawhttpserver_am263x-cc_r5fss0-0_nortos_ti-arm-clang.rar

It's a normal mcu_plus_sdk_am263x_10_02_00_13\source\networking\enet\core\examples\lwip\enet_cpsw_rawhttpserver

nortos project but with 2 netif configured

is it ethernet ip 10.24.68.178 ?

please configure 2 static local ip like 192.168.1.3 & 192.168.1.4 

Hi Rohal,

Is this also related to this thread: https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1523290/am2634-bootstrap-resistor-value-in-dp83822?

I see our PHY expert mentioned about the incorrect clocks in the above linked thread:

Evan Mayhew said:

AK said:

After we checked the reference clock we are getting 3Mhz - 5Mhz 

Is this the reference clock on XI of PHY? PHY requires 50M input clock on XI with strap table config.
Please also confirm if registers are accessible.

Also, can you try to run the enet_lwip_cpsw example with static IP configuration once (just to verify on your end as well that this issue is not specific to the rawhttps server example)? 

https://software-dl.ti.com/mcu-plus-sdk/esd/AM263X/latest/exports/docs/api_guide_am263x/EXAMPLES_ENET_LWIP_CPSW.html#autotoc_md2703 (change to static IP, rebuild the example and test)

Regards,
Shaunak

Hi Shaunak,

Is this also related to this thread: https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1523290/am2634-bootstrap-resistor-value-in-dp83822?

No, I'm working on eval board and Aakash working on our custom board, first we develop the 2 ip logic on eval board then port it to custom board.

we are using 25Mhz external crystal oscillator as clock source to the Phy and this reference clock is generated on clock ref pin which is connected between 

phy dp83822 and MCU am2634. 

In eval board 25Mhz TCXO used to provide the clock source to phy, Is there any setting to change the input clock from TCXO to external crystal?