TMDS243EVM: using ind_comms_sdk_am243x_11 add CPSW beside EtherCAT--Part2

Hi Chunyang

Can you please share your linker.cmd I need to see what changes you made to fit the program in the memory.

Also, where did you add the enet_lwip_example() in the main.c?

Hi

In the main.c

void ethercat_slave_beckhoff_ssc_demo_main(void *args);
void enet_lwip_example(void *args);

void freertos_main(void *args)
{
ethercat_slave_beckhoff_ssc_demo_main(NULL);
enet_lwip_example(NULL);

vTaskDelete(NULL);
}

//////////////////

In linker.cmd

MEMORY
{
R5F_VECS : ORIGIN = 0x0 , LENGTH = 0x40
R5F_TCMA : ORIGIN = 0x40 , LENGTH = 0x7FC0
R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x8000
NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
MSRAM : ORIGIN = 0x70080000 , LENGTH = 0xC0000    // Here I change 0xC8000 to 0xC0000    
USER_SHM_MEM : ORIGIN = 0x701D0000 , LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0180 , LENGTH = 0x3E80
RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000 , LENGTH = 0xC000
FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000

/* For memory Regions not defined in this core but shared by other cores with the current core */

}

I can not upload the file, so I copy all the content of my linker.cmd here,  as it is not very long.

////////////////////

/* This is the stack that is used by code running within main()
* In case of NORTOS,
* - This means all the code outside of ISR uses this stack
* In case of FreeRTOS
* - This means all the code until vTaskStartScheduler() is called in main()
* uses this stack.
* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack
*/

--stack_size=32768
/* This is the heap size for malloc() API in NORTOS and FreeRTOS
* This is also the heap used by pvPortMalloc in FreeRTOS
*/
--heap_size=32768
-e_vectors /* This is the entry of the application, _vector MUST be placed starting address 0x0 */

/* This is the size of stack when R5 is in IRQ mode
* In NORTOS,
* - Here interrupt nesting is enabled
* - This is the stack used by ISRs registered as type IRQ
* In FreeRTOS,
* - Here interrupt nesting is enabled
* - This is stack that is used initally when a IRQ is received
* - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks
* - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more
*/
__IRQ_STACK_SIZE = 256;
/* This is the size of stack when R5 is in IRQ mode
* - In both NORTOS and FreeRTOS nesting is disabled for FIQ
*/
__FIQ_STACK_SIZE = 256;
__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */
__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */
__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */

SECTIONS
{
.vectors : {
} > R5F_VECS , palign(8)

GROUP : {
.text.hwi : {
} palign(8)
.text.cache : {
} palign(8)
.text.mpu : {
} palign(8)
.text.boot : {
} palign(8)
.text:abort : {
} palign(8)
} > MSRAM

GROUP : {
.text : {
} palign(8)
.rodata : {
} palign(8)
} > MSRAM

GROUP : {
.data : {
} palign(8)
} > MSRAM

GROUP : {
.bss : {
} palign(8)
RUN_START(__BSS_START)
RUN_END(__BSS_END)
.sysmem : {
} palign(8)
.stack : {
} palign(8)
} > MSRAM

GROUP : {
.irqstack : {
. = . + __IRQ_STACK_SIZE;
} align(8)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
.fiqstack : {
. = . + __FIQ_STACK_SIZE;
} align(8)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
.svcstack : {
. = . + __SVC_STACK_SIZE;
} align(8)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
.abortstack : {
. = . + __ABORT_STACK_SIZE;
} align(8)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
.undefinedstack : {
. = . + __UNDEFINED_STACK_SIZE;
} align(8)
RUN_START(__UNDEFINED_STACK_START)
RUN_END(__UNDEFINED_STACK_END)
} > MSRAM

GROUP : {
.ARM.exidx : {
} palign(8)
.init_array : {
} palign(8)
.fini_array : {
} palign(8)
} > MSRAM

.bss.user_shared_mem (NOLOAD) : {
} > USER_SHM_MEM

.bss.log_shared_mem (NOLOAD) : {
} > LOG_SHM_MEM

.bss.ipc_vring_mem (NOLOAD) : {
} > RTOS_NORTOS_IPC_SHM_MEM

.bss.nocache (NOLOAD) : {
} > NON_CACHE_MEM

}

MEMORY
{
R5F_VECS : ORIGIN = 0x0 , LENGTH = 0x40
R5F_TCMA : ORIGIN = 0x40 , LENGTH = 0x7FC0
R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x8000
NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000
MSRAM : ORIGIN = 0x70080000 , LENGTH = 0xC0000
USER_SHM_MEM : ORIGIN = 0x701D0000 , LENGTH = 0x180
LOG_SHM_MEM : ORIGIN = 0x701D0180 , LENGTH = 0x3E80
RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000 , LENGTH = 0xC000
FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000

/* For memory Regions not defined in this core but shared by other cores with the current core */

}

I am able to reproduce your issue. Will figure out the cause and get back to you.

I am glad to know this, please go ahead, any update please let me know.

Many thanks,

Chunyang 

Hi Keshav,

   Thank you so much!

    My project can pass Build now.

    There was always "memory issue" error, until I enlarge the size as the following.

    MSRAM   : ORIGIN = 0x70080000 , LENGTH = 0x140000

    It is suitable for one single R5F core to use this size MSRAM?

    I could run this test on my board now. And I will get back to you then.

BR,

Chunyang  

yeah it should be okay to use this size MSRAM.

Hi Keshav,

   Thank you so much!

   My board can work with both EtherCAT and EtherNet now.

   I could stuck here for long time without your support.

BR,

Chunyang