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MCU-PLUS-SDK-AM243X: SDL documentation

Part Number: MCU-PLUS-SDK-AM243X

Tool/software:

Hi Experts,

Our team is working towards utilizing TI SDL modules to satisfy functional safety requirements. Can you help me get more documentation regarding the SDL submodules. In the TRM there is information on only few modules (DCC, MCRC ). For example, how to know which memory regions are tested for different PBIST Test instances? Can we configure different memory regions? 

Thanks,

Prithvi

  • Hi Prithvi,

    You can find more documentation about SDL in the MCU+SDK documentation:

    https://software-dl.ti.com/mcu-plus-sdk/esd/AM243X/11_01_00_17/exports/docs/api_guide_am243x/SDL_PAGE.html

    or example, how to know which memory regions are tested for different PBIST Test instances? Can we configure different memory regions? 

    No, it is not possible to configure what memory regions are tested by the PBIST instaces. You can check the examples/sdl/pbist/pbist_mpu/soc/am243x/pbist_test_cfg.c file to check the different modules tested by each pbist instance.

    Regards,

    Nihar Potturu. 

  • Hi Nihar,

    Can you please shed light on this. I am afraid I can not get the info on memories being tested, algorithm from the example code. 

    Also, many places in the SDL document suggests going through SOC document for more information but there is no information in the TRM related most of SDL modules. Do we have any resources which give more information on SDL modules?

  • Hello Prithvi,

    Can you please shed light on this. I am afraid I can not get the info on memories being tested, algorithm from the example code. 

    There is no sufficient information right now on PBIST in the TRM/SDL docs. There are four PBIST instances on AM243x:

    The above list from Pbist_test_cfg.c file shows the modules tested by the Infra and MCU instances. The R5F0 and R5F1 instances only cover the R5F internal memories like TCMs and Cache. 

    Regards,

    Nihar Potturu.