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AM2432: am2432 TCM questions

Rasty Slutsker
Expert 1850 points
Part Number: AM2432


Tool/software:

Hi,

We discovered that if we run single-core application on am2432 , core 0 gets whole TCM memory (128 kbytes) or core 0, while second core is not available (impossible to connect with debugger).

e2e contains contradictive information

a) on the one hand 

e2e.ti.com/.../4146851

says that

:

1. After Power On Reset, the R5F0 core is initially in Lockstep mode.

2. If your app image contains code for both cores, then our  SBL configures it into Dual Core mode.

3. If your app image contains code only for a single core, then it is configured to Lockstep mode.

b) On other hand "Device does not support lockstep mode and that statement wasn't accurate when it was made"

 AM2432: AM2432 lockstep 

The question are

1. what happens when am2432 boots with single R5 core application?

2. why second core is not available to debugger?

3. is it normal and by design that core 0 gets all TCM without any configuration efforts ?

4. should we expect some side effects like impact to perfromance.

Thanks

Rasty

  • 0
    TI__Guru 50587 points

    Hello Rasty,

    Sorry for the delayed reply as I was out of office.

    On this SoC, Lockstep mode is not supported at the SoC level.
    • By default, all R5F cores operate in split mode.
    • The SBL (Secondary Bootloader) checks the multicore application image to see which app images are present.
    • If an app image for a particular core is not present, the SBL will not initialize that core.
    • When a core is not initialized, you will not be able to connect a debugger to it.

    So, in your observation, the reason you were unable to connect the debugger is because the SBL did not initialize that core (as its app image was not included).

    Regards,

    Anil.

  • 0 in reply to Swargam Anil
    Expert 1850 points

    Hi 

    Thanks for the reply.

    Last questions remain, it appears that in  case of single core operation, all 128 kb of TCM is available on core 0.

    1. We didn't do anything to transfer all TCM to the core 0. Is it "by design" or unexpected side effect?

    2. Should we expect gain in performance because core 1 is not enabled?

    Thanks

    Rasty

  • 0 in reply to Rasty Slutsker
    TI__Guru 50587 points

    Hello Rasty,

    • In single-core mode, Core 0 can use the entire 128 KB of TCM. Please refer to the E2E thread below for details on configuring and using the full TCM in this mode.

     PROCESSOR-SDK-AM64X: How to Disable dual core mode of R5F and run in single core mode 


    • We have observed a performance increase when Core 0 accesses both TCMA and TCMB (normally associated with Core 1) compared to the split-mode configuration.
    • In split mode, each R5F core has its dedicated TCM memory. If one core needs to access the other core’s TCM, it must go through the global address space. Accessing memory via the global address view introduces additional latency compared to local CPU-view TCM access.

    Regards,

    Anil.