This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DCAN IF3 Interrupt Line Enable from DCAN Peripheral Side

Other Parts Discussed in Thread: TMS570LS3137

Hello Support,

In the TRM spnu499.pdf, I see the following statement:

23.11 Interrupt Functionality

Interrupts can be generated on two interrupt lines:

1. DCAN0INT line

2. DCAN1INT line

These lines can be enabled by setting IE0 and IE1 bits respectively in CAN Control Register.

The DCAN provides three groups of interrupt sources: Message Object Interrupts, Status Change

Interrupts and Error Interrupts.( see

Figure 23-13 and Figure 23-14

)

In the TMS470LS3137 Datasheet I see there is a DCANx IF3 Interrupt Line.

How do I enable the above mentioned DCANx IF3 Interrupt Line on the DCANx Peripheral Side [similar to IE0 and IE1].

I am assuming DEx bits only affects the DMAREQ Lines from DCAN to DMA.

Also, in the TRM as shown in the above section, there is no mentioned of DCANx IF3 Interrupt Source.

Please help me understand the DCANx IF3 Interrupt Line better with more details.

Thank you.

Regards

Pashan

 

  • Hello,

    The device is TMS570LS3137.

     

  • Hello Pashan,

    the DCAN IF3 interrupt line is triggered by the 'IF3 Upd' bit in the DCAN IF3OBS register. Please see the description in section '23.18.23 IF3 Observation Register (DCAN IF3OBS)' in the TRM (SPNU499).

    Best regards

    Andreas

     

    If a post answers your question, please mark it with the "verify answer" button.

  • Hello Andreas,

     'IF3 Upd'  is a Read Only Bit. How does CPU Software enable/disable from the DCAN Peripheral Side for IF3 Interrupt Line activation?

    I am looking for something like IE0 and IE1 bits of DCAN CTL Register for enabling/disable of DCAN IF3 Interrupt Line.

    Thank you.

    Regards

    Pashan

     

  • Hello Pashan,

    there is no additional bit in the DCAN module to enable/disable the IF3 interrupt line. When the IF3 Upd bit is set the IF3 interrupt line will be triggered. Of course you can enable/disable that interrupt in the VIM.

    Best regards

    Andreas

     

    If a post answers your question, please mark it with the "verify answer" button.