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AM2634: RAM initialisation

HS FAE Germany
Mastermind 32820 points

Part Number: AM2634
Other Parts Discussed in Thread: SYSCONFIG

Hi,
is the RAM initialisated after POR? Is that somewhere documentated?

Regards, Holger

  • 0
    TI__Guru 58390 points

    Yes it is mentioned in TRM under PBIST setion:

     

  • 0 in reply to Nilabh Anand
    TI__Mastermind 32820 points

    Hi Nilabh,
    what is the initialization value after PBIST of the RAM? 
    The RAM will be preserve after warm reset?

    Regards, Holger

  • 0 in reply to HS FAE Germany
    TI__Guru 58390 points
    HS FAE Germany said:
    what is the initialization value after PBIST of the RAM? 

    For RAM bank0 and bank1, after PBIST, it will set to 0.

    Even after warm reset RAM bank 0 and 1 will not be preserved

  • 0 in reply to Nilabh Anand
    TI__Mastermind 32820 points

    Hi Nilabh,
    why is OCRAM only tested on partitions 0 and 1 and initialized by the BootROM? What about partitions 2 and 3?
    Do these always have to be reset manually by the function SOC__rcmInitL2Memory as in the examples?

    Customer assumes that partitions 2 and 3 have Mem Group ID (Number) 12 and 13.
    He did not find a direct reference from L2OCRAM_BANKx_SLV to MEM_MSS_L2_x in the manual.

    Regards, Holger

  • 0 in reply to HS FAE Germany
    TI__Guru 58390 points
    HS FAE Germany said:
    why is OCRAM only tested on partitions 0 and 1 and initialized by the BootROM? What about partitions 2 and 3?

    It needs to be tested by SBL.

    HS FAE Germany said:
    Do these always have to be reset manually by the function SOC__rcmInitL2Memory as in the examples?

    Yes that is correct.

  • 0 in reply to HS FAE Germany
    TI__Guru 58390 points
    HS FAE Germany said:

    Customer assumes that partitions 2 and 3 have Mem Group ID (Number) 12 and 13.
    He did not find a direct reference from L2OCRAM_BANKx_SLV to MEM_MSS_L2_x in the manual.

    This can be found in Register addendum also.

  • 0 in reply to Nilabh Anand
    TI__Mastermind 32820 points

    Hi,

    Why isn't all RAM tested?
    Furthermore, can you interpret this in such a way that sections that are located in partitions 2 and 3 have absolutely no influence on the linker file initialization setting. Is that true?

    For information, they are now checking the cause of reset on the POR to verify the data in this area. So they have a workaround for their problem.

    So that they have a stable function in the future, they would like to know if there is a region in the entire memory where they can exchange data between the boot loader and the application program?
    It is not in the sense of a shared section as they know it from the IPC. In their case, the programs do not run at the same time. One of the use cases for this area is the transmission of information from the application program to the bootloader before a software reset. In this case, saving to an external flash is not high enough.

    Regards, Holger

  • 0 in reply to HS FAE Germany
    TI__Guru 58390 points
    HS FAE Germany said:
    Why isn't all RAM tested?

    Thats by design, ROM performs PBIST on the region which it uses. If all regions are done boottime will be impacted. 

    HS FAE Germany said:
    Furthermore, can you interpret this in such a way that sections that are located in partitions 2 and 3 have absolutely no influence on the linker file initialization setting. Is that true?

    I did not understand reasoning behind this, why would that be the case, If your SBL includes bank 2 and bank 3 and you have set initilization with 0 in your linker then they will be impacted, it depnds on how user creates linker.

    HS FAE Germany said:
    So that they have a stable function in the future, they would like to know if there is a region in the entire memory where they can exchange data between the boot loader and the application program?

    Ideally, this should be flash; if at all RAM is to be used, the application user has to design that paradigm.

    HS FAE Germany said:
    It is not in the sense of a shared section as they know it from the IPC. In their case, the programs do not run at the same time. One of the use cases for this area is the transmission of information from the application program to the bootloader before a software reset. In this case, saving to an external flash is not high e

    Again as stated before they would need to design and take care of it at application level.

  • 0 in reply to Nilabh Anand
    TI__Mastermind 32820 points

    Hello Nilabh,

    so then you shouldn’t use partitions 2 and 3? And it is assumed that custom bootloader is never > 1MB?
    So the ROM loader for the 2MB solution was never planned? Correct?

    The configuration of the linker file is done using SysConfig. When they adjust the settings in SysConfig, there is no impact for partitions 2 and 3.
    When executing this, he refers to the SOC__rcmInitL2Memory function. Is this correct?

    Regards, Holger

  • 0 in reply to HS FAE Germany
    TI__Guru 58390 points
    HS FAE Germany said:
    So the ROM loader for the 2MB solution was never planned? Correct?

    Yes, the max bootloader size is mentioned in TRM its less the 900MB

    HS FAE Germany said:
    The configuration of the linker file is done using SysConfig. When they adjust the settings in SysConfig, there is no impact for partitions 2 and 3.
    When executing this, he refers to the SOC__rcmInitL2Memory function. Is this correct?

    These both are not related; the API does not depend on syscfg or linker utilized partitions.