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AM2431: PCIe communication test with RPi CM4(PCIe RC)

Part Number: AM2431
Other Parts Discussed in Thread: TMDS243EVM

I downloaded and ran an example of enumerate_ep on the TMDS243EVM evaluation board, connected CM4 to PCIe, and booted it, and the following logs are output normally.

(Sadly, the issue that happened with CM5 the other day is still unresolved.... https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1569217/am2431-the-raspberry-pi-cm5-pcie-rc-cannot-properly-enumerate-the-am2431-tmds243evm-pcie-ep)

PCIe: EP initialized and waiting for link
PCIe: link detected
PCIe link parameter: PCIe Gen2 with 5.0 GT/s speed, number of lanes: 1
EP is in D0 state
PCIe: signaling APPL ready
APPL: pcie ready

In addition, entering the lspci -vv command in RPi CM4 will output the following logs normally. 

image.png

When CM4 enters the 

"sudo hexdump  /sys/bus/pci/devices/0000:01:0000.0/resource0 command"

the following error occurs.
hexdump: /sys/bus/pci/devices/0000:01:00.0/resource0: Input/output error

In this situation, when an EP sends a simple message or streams data, how does RC read that data? Which part of the example code should I modify?