MSPM0G3507-Q1: SYSPLL_ERR_01 errata some clarifications/questions

Hi Carlo,

Sorry for the late response. Somehow we missed this thread last week.

Colombo Carlo said:

Can I start the PLL without connecting it to the CPU clock? That would allow us to confirm it has the correct frequency, and only after that switch the CPU clock to use the PLL  , so to be sure CPU is working all the time on a proper clock 

Yes, it is the approach we define for this PLL errata.

This need re-check if user re-enable the PLL, this normally happens when user enter the low power mode and wake up (excepte sleep0 mode where PLL remains functionality).

Colombo Carlo said:

If I understand this correctly, when I  enable the PLL I  always need to run an FCC, and repeat the procedure if the FCC shows that the PLL doesn't use the correct frequency  .   Do you have a rough exstimation on  Typ time needed ? I need to reach lowest possible power and need to  add this extra time in the power budget .

The FCC takes around 30.5us if user select 1 LFCLK period.

PLL re-enable takes around max 24us to be stable.

To count the SYSPLL more preciously, you can refer to the demo I shared in a new thread:

 MSPM0G3507: Regarding SYSPLL_ERR_01  

B.R.

Sal