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MSPM0G3519: Writing to timer registers from a circular buffer with DMA

Grant Geyer
Prodigy 10 points

Part Number: MSPM0G3519

Hello,

I am attempting to write to three timer registers from a circular buffer on a single event. How should I best configure the DMA to do this?

mspm0 dma timer writing.png

  • 0
    TI__Genius 12311 points

    Hi Grant,

    Are the Timer register addresses consecutive?

    If yes, please set DMA as the block transfer, you can refer to "dma_block_transfer_LP_MSPM0G3519_nortos_ticlang" in our SDK.

    Once you start the second/third transfer, please set the source address and destination address, then start DMA.

    Regards,

    Zoey

  • 0 in reply to Zoey Wei
    Prodigy 10 points

    Hi Zoey,

    Yes the timer registers are consecutive.

    My aim is to not rewrite the source and destination addresses for each transfer. Is that possible with regular block transfers?

  • 0
    Guru 102065 points

    A block transfer doesn't really do what you want, since it does the full block then it is complete; you won't be able to "walk" through your source array.

    I'm guessing you want to write to CC_01[] and CC_23[0]. If you're not using CC_23[1], you could use a Single transfer with a long-long-word (4 words) transfer, where the 4th word is a dummy.

  • 0 in reply to Bruce McKenney
    TI__Expert 5430 points

    Hey Grant,

    I think what Bruce is saying is closer to what you want. Single transfer with a channel size of sizeof(circular_buff)/ sizeof(long long) 

    I also have this post here:

    MSPM0G3519: DMA memory alignment requirements - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

    It looks like maybe you need align these for the DMA transfer to work correctly. I was testing with long but I'd imagine it's the same for long long.

    ___

    Update from while I was in the middle of writing this post.

    Ok, so I think I have this working for single transfer from a block address to a fixed address. (and I was correct where the word alignment needs to be specified for this to work correctly).

    I can post this here or I can zip it up and send it to you.

    Munan

  • 0 in reply to Munan Xu
    TI__Expert 5430 points

    Hey just wanted to update on the forum for closure, we settled on single transfer for block address to fixed address using long long.

    I also wanted to mention in case anyone is curious, the timer trigger for 2 DMA channels requires each DMA channel to have its own subscriber port and we used the event channel 12 in order to have a 1-2 splitter for the timer event to trigger each DMA channel simultaneously. (it's not exactly simultaneous because the DMA does arbitration since only one physical transfer can happen at a time)

    Otherwise you can map both DMA channels to 1 timer event subscriber port, but what ends up happening is the first channel will complete its transfer before the second channel will start. 

    Munan