Part Number: AM2434
Team,
Question related to the below E2E thread (that is not yet 100% closed):
https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1617634/am2434-understanding-am2434-performance/6267048
Comparing the AM243x vs AM261x on-chip architecture:
|
AM243x |
AM261x |
|
32kB cache 800Mhz CPU clk |
16kB cache |
|
250Mhz clocked VBUSM 2MB OCSRAM (8x256kB)
51 cycles memory latency (ie cycles wasted per cache misses)
|
200Mhz clocked VBUSM 1.5MB OCSRAM (3x512kB) (but only 2x512kB on VBUSM)
24 cycles memory latency (ie cycles wasted per cache misses) |
-Is the interconnect/VBUSM interfacing between R5F and OCSRAM comparable for both?
-both have a 64bit wide interconnect bus?
-both have separated read and write ports (ie 32bit each) to interconnect?
-Is the main difference in the interconnect the fact that R5SS0 VBUSM is only present on AM261x/AM263P?
-Is it correct that on AM24x the R5F are interfaced direct on the main interconnect (ie shown as VBUSM Core interconnect below)?
-On AM24x interconnect there is the QoS concept:
For this use case (only R5F <-VBUSM -> OCSRAM being exercised) can QoS interconnect setting (OrderID, ASEL, Channel ID) play a role in the performance?
Can those settings (R5F <-VBUSM -> OCSRAM) to be tuned?
Does those setting make at all a difference for this use case since only R5F <-VBUSM -> OCSRAM are exercised?
Thanks in advance,
Anber
