AM13E23019: UART5 Line Timeout and RX Timeout interrupt delays

Part Number: AM13E23019
Other Parts Discussed in Thread: SYSCONFIG

Hi, In my application, I need to check if the Rx line is idle then I need to generate interrupt ASAP. I tried to implement this with the following sysconfig setting 

image.png

Exctract from my application 

 #define APP_UART_TRANSFER_SIZE (0x8U)
uint8_t tcf_txbuffer[APP_UART_TRANSFER_SIZE]={'T', 'C', 'F', 'T', 'E', 'S', 'T', ' '};
uint8_t ncf_txbuffer[APP_UART_TRANSFER_SIZE]={'N', 'C', 'F', 'T', 'E', 'S', 'T', ' '};
uint8_t tcf_rxbuffer[APP_UART_TRANSFER_SIZE], ncf_rxbuffer[APP_UART_TRANSFER_SIZE];
uint8_t txCount = 0, rxCount = 0;

us8 index = 0;
uint8_t uart_interrupt_graph[22][100];


main()
{

     /* Testing UART */
    while (txCount < APP_UART_TRANSFER_SIZE)
    {
        DL_UART_transmitData(APP_UART_0_INST, tcf_txbuffer[txCount]);
        txCount++;
    }
    
    while(DL_UART_isBusy(APP_UART_0_INST));
    
    /* Code to generate Break Character */
    DL_UART_enableLINSendBreak(APP_UART_0_INST);
    DL_Common_delayCycles(188330);
    DL_UART_disableLINSendBreak(APP_UART_0_INST); 

    txCount = 0;
    while (txCount < APP_UART_TRANSFER_SIZE)
    {
        DL_UART_transmitData(APP_UART_0_INST, ncf_txbuffer[txCount]);
        txCount++;
    }

    while(1)
    {
    // Superloop
    }
}

// ISRs
__attribute__((section(".TI.ramfunc")))
extern "C" void APP_UART_0_INT_Handler()
{
    g_diagCounters.uartIsrCount++;
    uint32_t interruptStatus = DL_UART_getPendingInterrupt(APP_UART_0_INST);
    uart_interrupt_graph[interruptStatus][index] = 1;
    index++;
    switch (interruptStatus)
    {
    //     /* UART interrupt index for end of transmission */
        case DL_UART_IIDX_EOT_DONE:
        {
            // LOG("UART IIDX: EOT_DONE\r\n");
            BSP_AM13E230_E2::Debug1Pin_Toggle();
            break;
        }
        /* UART interrupt index for Line Time Out */
        case DL_UART_IIDX_LTOUT:
        {
            // LOG("UART IIDX: LTOUT\r\n");
            BSP_AM13E230_E2::Debug3Pin_Toggle();
            break;
        }
        /* UART interrupt index for receive timeout */
        case DL_UART_IIDX_RX_TIMEOUT_ERROR:
        {
            BSP_AM13E230_E2::Debug2Pin_Toggle();
            // LOG("UART IIDX: RX_TIMEOUT_ERROR\r\n");
            break;
        }
    }
}





image.png

Note : TX and RX pins are exernally looped back and Logic analyser channel0 is connected to it. The optimisation levels are -O2

Issues : 

  1. what does it mean by Calculated RX Timeout Interrupt = 150 ns(in sysconfig) . Shall it depend on the baudrate ? How to decide this ?
  2. I am seeing around 1.5 ms of delay for Tx Timeout and Line Timout


  • Here is the screenshot showing 1.5 ms delay between End of Data Transmission and Timeout ISR execution) . Typographical error above (1.5 ms of delay for Rx Timeout and Line Timout)
    surprisingly when I configure the baud rate as 115200 then this delay reaches upto 15-20 ms 

  • Hi Dheeraj,

    The IFLS.RXTOSEL field selects the timing (x) for the RX timeout interrupt flag in the UART. This flag gets set when there is at least one element in the RX FIFO and no start edge is received after x amount of time. See below description:

    The line timeout interrupt on the other hand is triggered when there is no start edge for one character period (based on the configured baud rate) and the state of the RX FIFO has no effect.

    Let me know if this makes sense.

    Best Regards,

    Delaney