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RM57L843: RM57L843 Sleep mode

Damian Jablonski
Prodigy 10 points

Part Number: RM57L843

Hello,

I am looking for a solution to put the TI RM57L843 into sleep mode. To verify whether the clock domains and sources are successfully turned off, I am monitoring the ECLK pin on the MCU.

Note that application is executed from flash but sleep procedure is executed from RAM(in order to allow turn off flash). 
I am using the following procedure to put the CPU into sleep mode:

1. Disable all non-CPU bus masters.
2. Put all I/Os into sleep mode.
3. Disable the unnecessary clock domains using the CDDIS register (VCLK, VCLK2, VCLKA1, RTI, VCLK3, VCLK4).
4. Set the clock sources for wakeup (to HF LPO), during sleep mode (to LF LPO), and the current clock source (to HF LPO) using the GHVSRC register.
5. Disable LPO CLKDET.
6. Disable the unnecessary clock sources using the CSDIS register (EXTCLK2, PLL2, HFLPO, LFLPO, EXTCLK).
7. Program the flash banks and flash pump fallback modes to "sleep" 
8. Disable all remaining clock sources using CSDIS (OSC, PLL1).
9. Disable the remaining clock domains using CDDIS (HCLK, GCLK).
10. Idle the Cortex-R5F core using the WFI instruction.


The Issue:
After executing the procedure above, all clock domains are successfully turned off. However, there is an issue with disabling the clock sources: OSC and HF LPO remain active.

Since the CSDIS register is set to disable these clock sources, all clock domains are OFF, and the WFI command has been reached, what else could be causing this behavior?

Thank you for your help.

  • 0
    TI__Mastermind 20380 points

    Hello,

    This thread has been re-assigned to the intended expert. Please expect a reply early next week.

    Best,
    Matt

  • 0
    TI__Guru* 80156 points

    Hi ,

    Apologies for the delayed response!

    First of all, i would suggest you refer TI tested low power mode example of these devices. You can take this example as reference and can do your project modifications accordingly.

    (+) [FAQ] TMS570LC4357: Examples and Demos for Hercules Controllers (E.g. TMS570x, RM57x and RM46x etc) - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

    In case link doesn't work then download example directly from here:

    2100.TMS570LS0714PZ_LPMs_Wakeup.zip

    --
    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    Prodigy 10 points

    Hi,
    provided example is designated to similar MCU but not exactly the same one(There is no FPAC2 register nor FBFALLBACK register in Rm57l843 processor). However, I adapted example code to put mine application into sleep mode - it seems to work fine but there
    is an issue with wakeup part. When I'm trying to turn on Flash Pump i get immediately an abort. 

  • 0 in reply to Damian Jablonski
    TI__Guru* 80156 points

    Hi Damian,

    We have one internal AI, and i got below suggestions from it, could you please try out this.

    This is a well-known pitfall when adapting low-power examples from similar Hercules devices (like TMS570LC43x which has FPAC2/FBFALLBACK) to the RM57L843.

    Root Cause

    The abort you're seeing when trying to turn on the Flash Pump is almost certainly a Data Abort exception, triggered because:

    1. The Flash Pump is still in a low-power/sleep state when you attempt to access Flash control registers.
    2. Incorrect register sequence — on the RM57L843, the Flash wrapper registers and the pump power-up sequence differ from devices that have FPAC2/FBFALLBACK.
    3. Missing stabilization delay — the Flash Pump requires a settling time after being re-enabled before any Flash register access is safe.

    RM57L843 Flash Pump Wakeup — Correct Sequence

    On the RM57L843, the relevant registers are in the Flash Wrapper (FWPWRITE/FDIAGCTRL/FBAC/FBPROT) area. The correct wakeup sequence is:

    Step 1: Restore Flash Bank Active Grace Period Register (FBAC)

    flashWREG->FBAC = 0x0F; // or your application value

    Step 2: Enable the Flash Pump via FMREGOPT or FPAC1
    The RM57L843 uses FPAC1 (not FPAC2). Set the pump active grace period:

    flashWREG->FPAC1 = 0x0060; // Pump active grace period

    Step 3: Wait for the Flash Pump to become active
    You must insert a delay loop here. The pump needs time to charge up before any Flash access:

    // Wait for pump ready - typically ~100 µs at full clock speed
    volatile uint32_t i;
    for(i = 0; i < 0x200; i++) { /* wait */ }

    Step 4: Restore Flash Read/Access Wait States (FRDCNTL)

    flashWREG->FRDCNTL = 0x01; // Restore wait states appropriate for your clock

    Step 5: Re-enable Flash pipeline mode if used

    flashWREG->FRDCNTL |= 0x10; // pipeline mode

    Key Differences vs. Devices with FBFALLBACK/FPAC2

    Feature
    TMS570LC43x (example device)
    RM57L843
    Flash fallback control
    FBFALLBACK register
    Not present — use FBAC
    Pump control
    FPAC2
    FPAC1 only
    Bank sleep control
    FBFALLBACK bits
    FBAC BAGP field

    Most Likely Fix

    The abort is almost certainly caused by accessing Flash registers before the pump is ready. Make sure:

    1. White check mark You are using FPAC1 (not FPAC2) for pump control.
    2. White check mark You insert a sufficient delay after enabling the pump before any Flash access.
    3. White check mark You restore FBAC (Bank Active Grace Period) before enabling the pump.
    4. White check mark Your wakeup ISR or wakeup routine is executing from RAM (not Flash) during the pump power-up phase — if your wakeup code runs from Flash while the pump is still off, you will get an immediate abort.

    --
    Thanks & regards,
    Jagadish.