PWM Generator Triggered Single ADC Sequence Issue

#include <stdint.h>
#include <stdbool.h>
#include "inc/tm4c123gh6pge.h"
#include "inc/hw_types.h"
#include "inc/hw_memmap.h"
#include "inc/hw_adc.h"
#include "driverlib/sysctl.h"
#include "driverlib/adc.h"
#include "driverlib/interrupt.h"

#include "inc/hw_gpio.h"
#include "driverlib/gpio.h"



#define CASE_6


static void ADC0_IntAdcSeq0Handler(void);
static void ADC0_IntAdcSeq1Handler(void);
static void ADC1_IntAdcSeq0Handler(void);
static void ADC1_IntAdcSeq1Handler(void);

void Initialize_ADCs(void)
{
  uint32_t sequence = 0;
  uint32_t pwm_module = 1;
  uint32_t temp = 0;

  /************************  ADC Module 0 ********************************/
  // Enable ADC0 peripheral with dummy read to insert a few cycles.
  SysCtlPeripheralEnable( SYSCTL_PERIPH_ADC0 );
  temp = SYSCTL_RCGC2_R;
  temp = SYSCTL_RCGC2_R;
  temp = SYSCTL_RCGC2_R;


  // Set the ADC speed.
  // SysCtlADCSpeedSet( SYSCTL_ADCSPEED_125KSPS );  LM3 Legacy Function breaks PWM's
  // ADCSpeedSet( ADC0_BASE, ADC_PC_SR_125K );  // Missing new TivaWare function.
  ADC0_PC_R = 0x01;   // Set the register directly

  // Set reference source
  ADCReferenceSet( ADC0_BASE, ADC_REF_INT );

  // Disable the hardware over-sampling
  ADCHardwareOversampleConfigure( ADC0_BASE, sequence );

  /********************** Configure Sequence 0 in ADC0    *****************/
  sequence = 0;
  ADCSequenceDisable( ADC0_BASE, sequence );

  // Set the PWM Module the sequences will be triggered from
  HWREG(ADC0_BASE + ADC_O_TSSEL) |= (pwm_module) << ((8 * sequence) + 4);

  // Assign the Sequencer to the PWM and set it's priority to the Seq #
#if defined(CASE_2) || defined(CASE_1) || defined(CASE_3) || defined(CASE_4)
  ADCSequenceConfigure( ADC0_BASE, sequence, ADC_TRIGGER_PWM0, 0 );
  ADCSequenceStepConfigure( ADC0_BASE, sequence, 0, ADC_CTL_CH20 );
  ADCSequenceStepConfigure( ADC0_BASE, sequence, 1, ADC_CTL_CH21 | (ADC_CTL_IE | ADC_CTL_END) );
#elif defined(CASE_6)
  ADCSequenceConfigure( ADC0_BASE, sequence, ADC_TRIGGER_PWM1, 0 );
  ADCSequenceStepConfigure( ADC0_BASE, sequence, 0, ADC_CTL_CH20 );
  ADCSequenceStepConfigure( ADC0_BASE, sequence, 1, ADC_CTL_CH21 | (ADC_CTL_IE | ADC_CTL_END) );
#endif
  ADCSequenceEnable( ADC0_BASE, sequence );
  ADCIntClear( ADC0_BASE, sequence );
  ADCIntRegister( ADC0_BASE, sequence, ADC0_IntAdcSeq0Handler );
  ADCIntEnable( ADC0_BASE, sequence );
  IntEnable( INT_ADC0SS0 );


  /********************** Configure Sequence 1 in ADC0    *****************/
#if defined(CASE_4)
  sequence = 1;
  ADCSequenceDisable( ADC0_BASE, sequence );

  // Set the PWM Module the sequences will be triggered from
  HWREG(ADC0_BASE + ADC_O_TSSEL) |= (pwm_module) << ((8 * sequence) + 4);

  // Assign the Sequencer to the PWM and set it's priority to the Seq #
  ADCSequenceConfigure( ADC0_BASE, sequence, ADC_TRIGGER_PWM1, 0 );
  ADCSequenceStepConfigure( ADC0_BASE, sequence, 0, ADC_CTL_CH8 );
  ADCSequenceStepConfigure( ADC0_BASE, sequence, 1, ADC_CTL_CH9 );
  ADCSequenceStepConfigure( ADC0_BASE, sequence, 2, ADC_CTL_CH3 | (ADC_CTL_IE | ADC_CTL_END) );
  ADCSequenceEnable( ADC0_BASE, sequence );
  ADCIntClear( ADC0_BASE, sequence );
  ADCIntRegister( ADC0_BASE, sequence, ADC0_IntAdcSeq1Handler );
  ADCIntEnable( ADC0_BASE, sequence );
  IntEnable( INT_ADC0SS1 );
#endif


  /************************  ADC Module 1 ********************************/
  // Enable ADC0 peripheral with dummy read to insert a few cycles.
  SysCtlPeripheralEnable( SYSCTL_PERIPH_ADC1 );
  temp = SYSCTL_RCGC2_R;
  temp = SYSCTL_RCGC2_R;
  temp = SYSCTL_RCGC2_R;


  // Set the ADC speed.
  // SysCtlADCSpeedSet( SYSCTL_ADCSPEED_125KSPS );  LM3 Legacy Function breaks PWM's
  // ADCSpeedSet( ADC0_BASE, ADC_PC_SR_125K );  // Missing new TivaWare function.
  ADC1_PC_R = 0x01;   // Set the register directly

  // Set reference source
  ADCReferenceSet( ADC1_BASE, ADC_REF_INT );

  // Disable the hardware over-sampling
  ADCHardwareOversampleConfigure( ADC1_BASE, sequence );

  /********************** Configure Sequence 0 in ADC1    *****************/
  sequence = 0;
  ADCSequenceDisable( ADC1_BASE, sequence );

  // Set the PWM Module the sequences will be triggered from
  HWREG(ADC1_BASE + ADC_O_TSSEL) |= (pwm_module) << ((8 * sequence) + 4);

  // Assign the Sequencer to the PWM and set it's priority to the Seq #
#if defined(CASE_1)
  ADCSequenceConfigure( ADC1_BASE, sequence, ADC_TRIGGER_PWM1, 0 );
  ADCSequenceStepConfigure( ADC1_BASE, sequence, 0, ADC_CTL_CH8 );
  ADCSequenceStepConfigure( ADC1_BASE, sequence, 1, ADC_CTL_CH9 );
  ADCSequenceStepConfigure( ADC1_BASE, sequence, 2, ADC_CTL_CH3 | (ADC_CTL_IE | ADC_CTL_END) );
#elif defined(CASE_2)
  ADCSequenceConfigure( ADC1_BASE, sequence, ADC_TRIGGER_PWM0, 0 );
  ADCSequenceStepConfigure( ADC1_BASE, sequence, 0, ADC_CTL_CH20 );
  ADCSequenceStepConfigure( ADC1_BASE, sequence, 1, ADC_CTL_CH21 | (ADC_CTL_IE | ADC_CTL_END) );
#elif defined(CASE_3)
  ADCSequenceConfigure( ADC1_BASE, sequence, ADC_TRIGGER_PWM0, 0 );
  ADCSequenceStepConfigure( ADC1_BASE, sequence, 0, ADC_CTL_CH8 );
  ADCSequenceStepConfigure( ADC1_BASE, sequence, 1, ADC_CTL_CH9 );
  ADCSequenceStepConfigure( ADC1_BASE, sequence, 2, ADC_CTL_CH3 | (ADC_CTL_IE | ADC_CTL_END) );
#elif defined(CASE_6)
  ADCSequenceConfigure( ADC1_BASE, sequence, ADC_TRIGGER_PWM1, 0 );
  ADCSequenceStepConfigure( ADC1_BASE, sequence, 0, ADC_CTL_CH8 );
  ADCSequenceStepConfigure( ADC1_BASE, sequence, 1, ADC_CTL_CH9 );
  ADCSequenceStepConfigure( ADC1_BASE, sequence, 2, ADC_CTL_CH3 | (ADC_CTL_IE | ADC_CTL_END) );
#endif
  ADCSequenceEnable( ADC1_BASE, sequence );
  ADCIntClear( ADC1_BASE, sequence );
  ADCIntRegister( ADC1_BASE, sequence, ADC1_IntAdcSeq0Handler );
  ADCIntEnable( ADC1_BASE, sequence );
  IntEnable( INT_ADC1SS0 );
}


static void ADC0_IntAdcSeq0Handler(void)
{
  ADCIntClear( ADC0_BASE, 0 );
}

static void ADC0_IntAdcSeq1Handler(void)
{
  ADCIntClear( ADC0_BASE, 1 );
}

static void ADC1_IntAdcSeq0Handler(void)
{
  ADCIntClear( ADC1_BASE, 0 );
}

static void ADC1_IntAdcSeq1Handler(void)
{
  ADCIntClear( ADC1_BASE, 1 );
}

#include <stdint.h>
#include <stdbool.h>
#include "../../typedefs.h"
#include "inc/tm4c123gh6pge.h"
#include "inc/hw_types.h"
#include "inc/hw_memmap.h"      /* peripheral addresses       */
#include "driverlib/sysctl.h"   /* system control API */
#include "driverlib/gpio.h"     /* GPIO API             */
#include "driverlib/pwm.h"
#include "../pwm.h"
#include <stdio.h>
#include <stdarg.h>

/***********************************************************************************************//**
 * @details   Initialize a PWM generator at a specific frequency and polarity.  Pass in the channel
 *            (n 0-7), frequency in hz (100Hz to 100khz), center flag, and the invert flag (Inverted
 *            0/1). If the Centered flag is 0 the PWM signal will be left justified.  If it 1 the
 *            PWM signal will be centered.  This function does not enable the PWM's after setup.
 *            This allows for the syncing in time of multiple PWM's after they are configured.  
 *
 * @param     n    Channel number of the PWM (0-7)
 * @param     hz   Operation Frequency in hertz (100Hz to 100khz)
 * @param     centered Indicates how the counter works for interrupt triggers
 * @param     inverted Indicates whether active high or low (0 or 1)
 * @param     adc_trigger True if the channel/generator should generate an ADC sequence 
 **************************************************************************************************/
void hw_PWM1_Initialize(Int32 n, Int32 hz, UInt32 centered, UInt32 inverted, Boolean adc_trigger)
{
  volatile unsigned long temp;
  int PwmGen;
  int PwmN;
  int PwmBit;

  unsigned long Config = (
    PWM_GEN_MODE_NO_SYNC         |      // If sync'd, then a manual force sync must be called
                                        //   when making changes to the period or pulse width.
                                        //   Can be sync'd across multiple PWM's.
    PWM_GEN_MODE_DBG_STOP        |
    PWM_GEN_MODE_GEN_SYNC_LOCAL  |      // Changes to the PWM are made when the Load counter
                                        //   reaches 0 at the end of the PWM cycle. Prevents
                                        //   pulses from triggering A to D sequence in the middle
                                        //   of an A to D sequence.  Errata also applies. The Global
                                        //   setting would also require a sync function to be called
                                        //   in order to update the settings.
    PWM_GEN_MODE_DB_NO_SYNC      |      // No Deadband usage in this configuration.
    PWM_GEN_MODE_FAULT_UNLATCHED |
    PWM_GEN_MODE_FAULT_NO_MINPER |
    PWM_GEN_MODE_FAULT_LEGACY);


  switch(n)
  {
    case 0: PwmGen = PWM_GEN_0; PwmN = PWM_OUT_0; PwmBit = PWM_OUT_0_BIT; break;
    case 1: PwmGen = PWM_GEN_0; PwmN = PWM_OUT_1; PwmBit = PWM_OUT_1_BIT; break;
    case 2: PwmGen = PWM_GEN_1; PwmN = PWM_OUT_2; PwmBit = PWM_OUT_2_BIT; break;
    case 3: PwmGen = PWM_GEN_1; PwmN = PWM_OUT_3; PwmBit = PWM_OUT_3_BIT; break;
    case 4: PwmGen = PWM_GEN_2; PwmN = PWM_OUT_4; PwmBit = PWM_OUT_4_BIT; break;
    case 5: PwmGen = PWM_GEN_2; PwmN = PWM_OUT_5; PwmBit = PWM_OUT_5_BIT; break;
    case 6: PwmGen = PWM_GEN_3; PwmN = PWM_OUT_6; PwmBit = PWM_OUT_6_BIT; break;
    case 7: PwmGen = PWM_GEN_3; PwmN = PWM_OUT_7; PwmBit = PWM_OUT_7_BIT; break;
    default: return;
  }

  // At the current clock rate the PWMs are limited to 100Hz to 100kHz.
  if (hz < 100)   hz = 100;
  if (hz > 100000) hz = 10000;

  // Enable the peripheral.
  SysCtlPeripheralEnable(SYSCTL_PERIPH_PWM1);

  // Do a dummy read to insert a few cycles after enabling the peripheral.
  temp = SYSCTL_RCGC2_R;
  temp = SYSCTL_RCGC2_R;

  // Set the PWM clock to the system clock / 4.
//  PWM1_PC_R = 0x00000101;                   // Direct hardware set
//  PWMClockSet(PWM1_BASE, PWM_PC_PWMDIV_4);  // Missing new TivaWare function
  SysCtlPWMClockSet(SYSCTL_PWMDIV_4);         // LM3 Legacy Function

  // The PWM can be centered or left justified.
  if (centered)
  {
    Config |= PWM_GEN_MODE_UP_DOWN;
  }
  else
  {
    Config |= PWM_GEN_MODE_DOWN;
  }

  // Configure the PWM generator with the above set options.
  PWMGenConfigure(PWM1_BASE, PwmGen, Config);

  // Set the period for the selected PWM generator.
  PWMGenPeriodSet(PWM1_BASE, PwmGen, (SysCtlClockGet()/4) / hz);

  // Set up a small dummy pulse width to keep the tied A to D sequencer from colliding.
  PWMPulseWidthSet(PWM1_BASE, PwmN, 200);

  // Invert the PWM signal.
  PWMOutputInvert(PWM1_BASE, PwmBit, (inverted != 0));

  // Set up a trigger that can be captured by the A to D to start a capture sequence.
  if (adc_trigger)
  {
    PWMGenIntTrigEnable(PWM1_BASE, PwmGen, PWM_TR_CNT_LOAD);
  }
  else
  {
    PWMGenIntTrigDisable(PWM1_BASE, PwmGen, PWM_TR_CNT_LOAD);
  }
}

/*************************************************************************/
   
SysCtlClockSet( SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ );


SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOG );

GPIOPinConfigure(GPIO_PG2_M1PWM0);
GPIOPinTypePWM(GPIO_PORTG_BASE, GPIO_PIN_2);
hw_PWM1_Initialize( 0, 3000, 1, 0, True );

GPIOPinConfigure(GPIO_PG3_M1PWM1);
GPIOPinTypePWM(GPIO_PORTG_BASE, GPIO_PIN_3);
hw_PWM1_Initialize( 1, 3000, 1, 0, True );

GPIOPinConfigure(GPIO_PG4_M1PWM2);
GPIOPinTypePWM(GPIO_PORTG_BASE, GPIO_PIN_4);
hw_PWM1_Initialize( 2, 2000, 1, 0, True );

PWMGenEnable(PWM1_BASE, PWM_GEN_0);
PWMGenEnable(PWM1_BASE, PWM_GEN_1);